Verification Engineer 2322

Sunrise Biztech Systems; Bengaluru; On-site; INR 1,800,000 - 2,400,000; Full time

Job summary

Sunrise Biztech Systems Pvt. Ltd. in Bangalore seeks an experienced ASIC/SoC Design Verification Engineer to join our manufacturing client’s team. You will develop UVM-based verification environments, stimulus, checkers and coverage, driving DV sign-off and RTL quality.

The role requires 10+ years in design verification, strong Verilog/SystemVerilog, UVM/OVM, and proficiency with Python/Perl/Shell/Makefile for automation. ARM Cortex/RISC SoCs and NoC experience is a plus.

Qualifications

• 10+ years in design verification.
• Experience with SoC/sub-system/IP level ASIC verification.
• Strong background in Verilog/SystemVerilog and UVM/OVM.

Responsibilities

• Perform SoC/sub-system/IP-level ASIC verification and develop UVM testbenches.
• Verify ARM Cortex/RISC processor-based SoCs, clock/reset, and NoC.
• Work on AXI/AHB/APB, PCIe, DDR, USB; MIPI is a plus.
• Support Pre-Si validation and firmware teams; debug RTL/simulation.
• Drive coverage closure and DV sign-off; ensure RTL quality.
• Use Python/Perl/Shell/Makefile for automation.
• Mentor junior engineers and provide technical leadership.

Skills

UVM/OVM

Verilog

SystemVerilog

C programming

DV sign-off

SoC verification

Automation scripting

Tools

Python

Perl

Shell

Makefile

Job description

Urgent Hiring!!!

Greetings from Sunrise Biztech Systems Pvt. Ltd.

We are hiring for one of our top leading Manufacturing client. If you're interested and your experience matches the requirement, we'd love to hear from you.

Job Title: Verification Engineer 4

Location: Bangalore

Duration: 12 Months

We are looking for an experienced ASIC/SoC Design Verification Engineer with strong expertise in Verilog, SystemVerilog, C, and UVM/OVM. The candidate will be responsible for developing UVM-based verification environments, creating stimulus, checkers, scoreboards, functional coverage, assertions, and driving coverage closure and DV sign-off.

Key Responsibilities:

• Perform SoC/Sub-system/IP-level ASIC verification and develop UVM testbenches.
• Verify ARM Cortex/RISC processor-based SoCs, clock/reset, and NoC.
• Work on protocols such as AXI/AHB/APB, PCIe, DDR, USB; MIPI is an advantage.
• Support Pre-Si validation and firmware teams and debug RTL/simulation issues.
• Drive coverage closure, RTL quality checks, and DV sign-off.
• Use Python/Perl/Shell/Makefile for automation.
• Mentor junior engineers and provide technical leadership.

Experience:

10+ years in Design Verification.