Hardware Architect

Ceremorphic, Inc.; Hyderabad; On-site; INR 2,400,000 - 4,000,000; Full time

Job summary

Ceremorphic, Inc. is seeking a senior hardware architect to lead end-to-end system architecture for SOCs used in AI accelerators. You will gather requirements, write hardware specs, and perform technical reviews while coordinating across silicon and software teams.

Responsibilities include driving major architectural decisions, optimizing for power efficiency, and collaborating with IP, DFT, verification, reliability, and security groups to deliver robust, high-performance designs.

Qualifications

• End to End ownership of the hardware architecture.
• Gather requirements, create hardware specifications, and conduct technical reviews.
• Collaborate with Algorithm and software teams on software and hardware co-design.
• Work with ASIC designers to define low power methodologies for high power efficiency.
• Coordinate with IP, DFT, and Verification, Reliability, and Security teams.
• Drive major technical decisions and stay aware of trends in ASIC design and AI technologies.

Responsibilities

• Define and specify system architecture across domains from silicon to software.
• Collaborate with ASIC teams on power-efficient methodologies and performance targets.
• Coordinate with IP, DFT, verification, reliability, and security teams to ensure robust designs.

Skills

System architecture design

Hardware for HPC/ML

SoC architecture definition

Power management

ASIC & FPGA design

Interconnects & I/O

Cross-functional collaboration

Job description

Processor design companies around the world are developing AI HW accelerators to revolutionize AI applications and data analytics, and to power data centres. Ceremorphic is seeing hardware architects who have in-depth knowledge and experience in the design, architecture, and performance analysis of SOCs. You will be responsible for the definition and specification of system architecture while collaborating across domains from silicon to software. Your responsibilities will involve the following:

• End to End ownership of the hardware architecture.
• Gather requirements, create hardware specifications, and conduct technical reviews.
• Collaborate with Algorithm and software teams on software and hardware co-design.
• Work with ASIC designers to define the low power methodologies to achieve the highest power efficiency.
• Coordinate with IP, DFT, and Verification, Reliability, and Security teams.
• Drive major technical decisions and possess an awareness of the latest trends in ASIC design, AI technologies.

Key Qualifications

• Ability to develop system architecture options that meet requirements, analyse system performance, and make recommendations based on various optimization criteria.
• Strong track record of developing innovative hardware for high-performance computing, machine learning, or related fields
• Knowledge and industry experience in all aspects of SoC architecture definition such as Clocks, Resets, Power-Sequencing, Power Management, Interrupts, Interconnects, Boot, Virtualization, Security, System Performance, Serial I/O, (PCIe, USB, Ethernet), Platform integration.
• Knowledge and industry experience in ASIC and FPGA design and implementation. (e.g., microarchitecture, design verification, physical design, etc).
• Strong communication skills and the desire to collaborate in a team of engineers.