Functional Verification Engineer | Logicsemi Technologies Pvt Ltd | Hyderabad

Logicsemi Technologies Pvt Ltd

Hyderabad

On-site

INR 1,500,000 - 3,000,000

Full time

4 days ago
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Job summary

Logicsemi Technologies Pvt Ltd in Hyderabad, India, seeks an experienced Functional Verification Engineer to lead ASIC/SoC verification efforts. You will build robust UVM-based testbenches and drive coverage closure in a fast-paced semiconductor environment.

Ideal candidates have 6+ years of VLSI verification, deep SystemVerilog/UVM expertise, and AMBA protocol knowledge. This on-site role offers competitive compensation and strong opportunities for technical leadership.

Qualifications

  • 6+ years of ASIC/SoC verification experience.
  • Strong SystemVerilog and UVM expertise.
  • AMBA AXI/AHB/APB protocol knowledge.
  • SVA and scripting (Python/Perl/Tcl) proficiency.

Responsibilities

  • Develop and maintain reusable UVM-based verification environments.
  • Write verification plans, test scenarios, and directed/constrained-random tests.
  • Implement drivers, monitors, scoreboards, and sequences.
  • Drive coverage closure, regression management, and sign-off.
  • Debug and root-cause protocol violations; analyze waveforms.
  • Verify AXI, AHB, and APB AMBA protocols.

Skills

SystemVerilog
UVM
AMBA protocols
SVA
Python
Perl
Tcl
Debugging
Regression management
Testbenches

Education

Bachelors in Electronics Engineering
Masters in VLSI Design
Masters in Computer Science

Tools

Git
UPF/CPF
Gate-level simulation

Job description

Position Summary:

Driving advanced silicon verification and high-performance semiconductor design validation, Logicsemi Technologies Pvt Ltd is actively expanding its engineering division with an opening for an accomplished Functional Verification Engineer in Hyderabad. In this critical design verification role, you will architect, build, and maintain robust UVM-based testbenches, verify complex ASIC and SoC designs, and ensure absolute compliance with microarchitectural specifications. Bringing over six years of dedicated VLSI verification experience and deep mastery of SystemVerilog, UVM, and AMBA protocols, you will empower our team to deliver flawless silicon solutions. This career opportunity offers competitive remuneration, technical visibility, and exceptional professional growth within a premier semiconductor engineering enterprise.

Detailed Job Description:

As a Functional Verification Engineer supporting Logicsemi Technologies in Hyderabad, India, you will take full operational, architectural, and tactical ownership of ASIC/SoC functional verification, testbench development, and coverage closure. Your day-to-day responsibilities include developing and maintaining reusable UVM-based verification environments, authoring comprehensive verification plans, test scenarios, and directed/constrained-random test cases, and implementing drivers, monitors, scoreboards, and sequences. You will execute regression management, perform detailed debugging and root-cause analysis of functional failures, and verify AMBA protocol compliance (AXI/AHB/APB).

Key Responsibilities:
  • Execute rigorous functional verification of complex ASIC and SoC silicon designs across IP and subsystem levels.
  • Develop, maintain, and scale robust UVM-based verification environments and reusable VIPs.
  • Author comprehensive verification plans, detailed test scenarios, and structured test cases from design specifications.
  • Implement reusable testbenches, transaction sequences, drivers, monitors, checkers, and scoreboards.
  • Drive functional and code coverage closure, regression management, and metric-driven verification sign-off.
  • Perform advanced debugging, waveform analysis, and root-cause isolation of simulation failures and protocol violations.
  • Verify high-speed bus interfaces and AMBA communication protocols including AXI, AHB, and APB.
  • Integrate assertion-based verification (SVA) and utilize scripting languages (Python/Perl/Tcl) to automate verification flows.
Required Qualifications & Skills:
  • Bachelor’s or Master’s degree in Electronics Engineering, VLSI Design, Computer Science, or a related technical discipline.
  • Minimum of 6+ years of progressive professional experience in ASIC/SoC design verification and VLSI engineering.
  • Strong, demonstrable hands‑on professional expertise in SystemVerilog and Universal Verification Methodology (UVM).
  • Comprehensive working knowledge and practical proficiency in developing reusable testbenches, scoreboards, and sequences.
  • Deep practical experience in functional coverage, code coverage, and verification closure methodologies.
  • Solid practical experience understanding AMBA protocols (AXI, AHB, APB) and digital logic concepts.
  • Proven expertise in assertion-based verification (SVA) and scripting languages such as Python, Perl, or Tcl.
  • Exceptional analytical, troubleshooting, debugging, and cross-functional communication capabilities.
Nice-to-Have Skills:
  • Professional certifications or advanced coursework in VLSI design, advanced verification, or digital IC design.
  • Prior professional working experience in top-tier semiconductor product companies, IP design houses, or EDA firms.
  • Hands‑on familiarity with formal verification tools, gate-level simulation, and power‑aware verification (UPF/CPF).
  • Experience utilizing CI/CD automation pipelines, regression tracking databases, and version control systems (Git, SVN).
  • Exposure to agile development methodologies and enterprise IT service management ticketing platforms (ServiceNow, Jira).
Employment Details:

Contract Duration: Permanent / Full-Time On-Site Engagement (Hyderabad)

Notice Period: Immediate to 30 Days Preferred

Salary/Rate: Market Competitive / Enterprise VLSI Engineering Package

Deadline: Open until filled (Urgent Hyderabad Verification Opening)

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