FPGA Verification Engineer

Swediumglobal; Bengaluru; On-site; INR 1,400,000 - 2,800,000; Full time

Job summary

Swedium Global is seeking FPGA Verification Engineers for hybrid onsite work in Bangalore or Chennai. You will define verification strategies for FPGA/ASIC designs, implement testbenches, and drive coverage with collaboration across HW, SW, and systems teams.

You will create regression suites, analyze results, and contribute to toolchain improvements. A strong track record in FPGA/ASIC verification and proficiency in UVM/OVM, SystemVerilog, and industry tools are essential for success.

Qualifications

• 5+ years of experience in FPGA/ASIC verification.
• A track record of successful verification of standard/custom IP blocks.
• Strong expertise in verification methodologies such as UVM/ OVM.
• Proficiency in SystemVerilog/ Verilog.
• Ability to architect and create UVM/RTL testbenches from scratch.
• Experience with simulation and verification tools Xcelium, VCS, QuestaSim.
• Experience with waveform viewers, debugging techniques and coveragedriven verification.
• Experience with scripting languages such as Python, Tcl, shell scripting, etc.
• Understanding/project experience in communication protocols Ex: PCIe,Ethernet, DDR, SPI, I2C, I3C, AXI, APB.
• Strong knowledge of digital design fundamentals, timing, clock domain crossing.
• Experience in version control GIT, ClearCase.
• An analytical approach and results-oriented mindset with the ability to deliver under pressure.

Responsibilities

• Define verification requirements and strategies for FPGA and/or ASIC designs based on functional specifications and Ericsson development processes.
• Implement verification environments and test cases to execute verification plans.
• Measure functional and code coverage metrics, driving towards completion targets.
• Collaborate with hardware, software, systems, and integration teams to understand overall product requirements and drive efficient solutions.
• Analyze simulation results, debug issues, and collaborate with design teams for resolution.
• Create, maintain and enhance regression suites and verification environments.
• Contribute to the continuous improvement of products, tools, and processes.
• Participate in test plan, test case, code review and ensure high standards.

Skills

FPGA verification

ASIC verification

UVM/OVM

SystemVerilog

Verilog

UVM testbenches

Python

Tcl

Shell scripting

PCIe

Ethernet

DDR

SPI

I2C

I3C

AXI

APB

clock domain crossing

digital design fundamentals

GIT

ClearCase

Tools

Xcelium

VCS

QuestaSim

GIT

ClearCase

Job description

Swedium Global is the growing System Engineering and Solution Company, offers services like Semiconductor Engineering R&D Services, Embedded Systems Development, Custom Application Software Development, Web and Cloud Application Development, Testing Services, Consultancy and Outsourcing services to our clients across the globe for an onsite and offshore business model. Swedium Global is having presence in Sweden, Finland, Poland, Czech Republic and in India.

Location: Onsite in Bangalore or Chennai (Hybrid)

We are looking for FPGA VerificationEngineers

Role:

Define verification requirements and strategies for FPGA and/or ASIC
designs based on functional specifications and Ericsson development
processes.
• Implement verification environments and test cases to execute verification
plans.
• Measure functional and code coverage metrics, driving towards completion
targets.
• Collaborate with hardware, software, systems, and integration teams to
understand overall product requirements and drive efficient solutions.
• Analyze simulation results, debug issues, and collaborate with design teams
for resolution.
• Create, maintain and enhance regression suites and verification
environments.
• Contribute to the continuous improvement of products, tools, and processes.
• Participate in test plan, test case, code review and ensure high standards.

Skills
• 5+ years of experience in FPGA/ASIC verification.
• A track record of successful verification of standard/custom IP blocks.
• Strong expertise in verification methodologies such as UVM/ OVM.
• Proficiency in SystemVerilog/ Verilog.
• Ability to architect and create UVM/RTL testbenches from scratch.
• Ability to understand, reuse existing test benches effectively and/or write
reusable, modular and well documented UVM test benches verification.
• Experience with simulation and verification tools Xcelium, VCS, QuestaSim.
• Experience with waveform viewers, debugging techniques and coveragedriven
verification.
• Experience with scripting languages such as Python, Tcl, shell scripting, etc.
• Understanding/project experience in communication protocols Ex: PCIe,
Ethernet, DDR, SPI, I2C, I3C, AXI, APB.
• Strong knowledge of digital design fundamentals, timing, clock domain
crossing.
• Experience in version control GIT, ClearCase.
• An analytical approach and results-oriented mindset with the ability to
deliver under pressure.

Preferred Skills
• Familiarity with modern FPGA device families and tools