ASIC IP Verification Engineer

Swediumglobal; Bengaluru; On-site; INR 1,500,000 - 2,200,000; Full time

Job summary

Swedium Global is seeking an experienced verifier to join its ASIC/SoC verification team in Bengaluru. You will participate in design verification at block or subsystem level, build UVM environments, and contribute to verification plans and methodologies.

Required 5+ years in ASIC IP verification with SystemVerilog and UVM; familiarity with AXI/CHI and SV assertions is essential. Collaboration with cross-functional teams and documentation throughout the lifecycle are expected.

Qualifications

• 5+ years industry experience in ASIC IP verification using SystemVerilog and UVM.
• Experience developing verification test plans and creating directed/randomized test cases.
• Implementing scoreboards, checkers, and bus functional models within UVM environments.
• AMBA-based designs such as AXI/CHI with SystemVerilog Assertions.
• Experience with Cadence or Synopsys verification suites.

Responsibilities

• Take part in verification of designs at block or subsystem level.
• Define and implement UVM-based test environments.
• Support creation of Verification Strategies and Verification Plans.
• Develop, run, and debug test cases to ensure design quality.
• Contribute to verification methodologies improvements.
• Generate documentation throughout the verification lifecycle.
• Collaborate with verifiers, designers, and architects.
• Build competence in the technical domain and cross-team project delivery.

Skills

ASIC IP verification

SystemVerilog

UVM

Verification test plans

Directed/randomized testing

Scoreboards

Checkers

BFM (Bus Functional Models)

AMBA AXI/CHI

SystemVerilog Assertions

Cadence

Synopsys verification suites

Jira

Jenkins

Simscope

Tools

Cadence

Synopsys

Jira

Jenkins

Simscope

Job description

Swedium Global is the growing System Engineering and Solution Company, offers services like Semiconductor Engineering R&D Services, Embedded Systems Development, Custom Application Software Development, Web and Cloud Application Development, Testing Services, Consultancy and Outsourcing services to our clients across the globe for an onsite and offshore business model. Swedium Global is having presence in Sweden, Finland, Poland, Czech Republic and in India.

Experience - 5-10years

Role Summary

Take part in the verification of designs, at block or subsystem level.

• Participate in defining and implementing UVM-based test environments.

• Support the creation of Verification Strategies and contribute to the development and execution of Verification Plans.

• Develop, run, and debug test cases to ensure design quality.

• Contribute to the improvement and optimization of verification methodologies.

• Generate documentation throughout the verification lifecycle.

• Collaborate closely with other verifiers, designers, and architects.

• Build competence in the technical domain.

• Engage in cross-team collaboration to ensure successful project delivery Required skills

• 5+ years industry experience in ASIC IP verification using SystemVerilog and UVM.

• Strong experience in / with: - developing verification test plans and creating directed/randomized test cases.

• Implementing scoreboards, checkers, bus functional models within UVM environments. - - AMBA-based designs such as AXI and CHI. SystemVerilog Assertions.

Additional Requirements:

• Experience with Cadence or Synopsys verification suites.

Preferred Skills

• Understanding of radio access systems and their components.

• Working knowledge of systems for continuous integration (e.g., Jenkins), simulation and analysis environments (e.g., Simscope), issue-tracking (e.g., Jira).

• Experience in verification in one or more of the following hardware domains: - ARM-based real-time embedded microcontroller systems including their control and interface peripherals.

Wireless infrastructure specific protocols and interfaces and protocols. - Implementation of hardware-based digital signal processing systems (filters, adaptation, etc.)