Emulation Engineer (Ethernet) (CE510SI RM 4585)

Source-Right; Ahmedabad District; Vor Ort; INR 1.500.000 - 2.300.000; Vollzeit

Zusammenfassung

Source-Right invites an experienced Emulation Engineer to verify Ethernet switch chips using pre-silicon techniques on emulation platforms. You will develop tests in Tcl, ITcl, Python, and C/C++, and build models for Zebu or Palladium while collaborating with DV and Software teams.

You will perform block-, sub-system-, and chip-level verification, define verification scopes, and contribute to infrastructure for networking switches in a collaborative, office-based setting in India.

Qualifikationen

• Define pre-silicon test plans to validate switch features across architectures.
• Verify design, architecture and micro-architecture on emulation platforms.
• Develop subsystem and chip-level tests using Tcl, ITcl, Python, and C/C++ for networking switches.
• Build Verilog/SystemVerilog-based models for emulation platforms (Zebu/Palladium).
• Collaborate with Architecture, DV, and Software teams for full verification coverage.

Aufgaben

• Conduct detailed studies of chip architecture to define comprehensive pre-silicon tests.
• Verify design, architecture and micro-architecture using emulation platforms.
• Develop subsystem and chip-level tests using Tcl, ITcl, Python, and C/C++ for emulation validation.
• Create synthesizable models for emulation platforms such as Zebu or Palladium.
• Debug and analyze hardware/software issues and improve verification efficiency and coverage.
• Enhance automation scripts and emulation methodologies for reusable verification components.

Kenntnisse

Tcl/ITcl

Python

C/C++

Ethernet verification

Emulation platforms

Ausbildung

BE/ME Electronics

Tools

Zebu

Palladium

DPI

Verilog/SystemVerilog

IXIA/Spirent

Jobbeschreibung

Position: Emulation Engineer (Ethernet) (CE510SI RM 4585)

Design Verification With Ethernet Experience Needed

Shift timing : 9-6 Work Mode : Work from office Experience Level : 5-10 years (No over qualified profiles than this years of experience) Relevant Experience required : 5-8 years Education Required : BE or ME Electronics

Must Have Skills

• Develop sub-system and chip-level tests using Tcl, ITcl, Python, and C/C++ to verify networking switch chips in emulation platforms
• Verify the design, architecture, and micro-architecture using emulation platforms.
• Conduct detailed studies of chip architecture and micro-architecture to define, develop, and execute comprehensive pre-silicon test plans that thoroughly validate switch features.
• Build and synthesize Verilog/SystemVerilog-based models for emulation platforms such as Zebu or Palladium
• PCIe/Ethernet protocol
• DPI

Job Description

• Conduct detailed studies of chip architecture and micro-architecture to define, develop, and execute comprehensive pre-silicon test plans that thoroughly validate switch features.
• Verify the design, architecture, and micro-architecture using emulation platforms.
• Develop sub-system and chip-level tests using Tcl, ITcl, Python, and C/C++ to verify networking switch chips in emulation platforms.
• Build and synthesize Verilog/SystemVerilog-based models for emulation platforms such as Zebu or Palladium.
• Perform block, sub-system and chip/system-level debugging and root cause analysis for hardware and software issues, addressing pre-silicon challenges.
• Develop and optimize automation scripts and emulation methodologies to improve efficiency, reusability, and coverage.
• Create reusable synthesizable design blocks, libraries, and verification components to streamline emulation processes.
• Build and maintain robust emulation environments that support a global user community.
• Collaborate closely with Architecture, Micro-Architecture, Design, DV, and Software teams to achieve comprehensive verification coverage and smooth project execution.
• Ability to define verification scope and contribute to the development of verification infrastructure for networking switches.
• Experience collaborating with architects, designers, and software engineers to achieve verification goals.
• Hands- on experience with emulation platforms (Zebu, Palladium), traffic generators (IXIA, Spirent), and high-speed interface protocols (e.g., PCIe, Ethernet) is desirable.
• Strong debugging skills and familiarity with DPI transactors, assertions, and coverage-driven verification.
• Verification engineers with simulation backgrounds are also encouraged to apply strong verification fundamentals are highly