Emulation Prototyping Engineer

Cortex Consultants LLC; Hyderabad; On-site; INR 1,200,000 - 1,800,000; Full time

Job summary

Cortex Consultants LLC in Hyderabad is seeking an Emulation Prototyping Engineer to advance pre-silicon verification using Synopsys Zebu emulators and FPGA/Emulation platforms.

The role focuses on bringing up emulation cutdowns, porting test benches, debugging AVIPs and transactors, and collaborating with RTL, DV, and software teams to improve performance and coverage.

Qualifications

• Hands-on experience with Synopsys Zebu emulators.
• Strong debugging and development of AVIPs and transactors.
• Proficiency in SystemVerilog, UVM, and scripting (Python, Perl, Shell).
• Solid understanding of SoC architecture and hardware/software co-debugging.
• Experience with waveform analysis tools Verdi and DVE.
• Ability to optimize test cases while preserving coverage.

Responsibilities

• Own and bring up emulation cutdowns for large SoCs and IP blocks to improve performance and turnaround.
• Adapt and port test benches to run efficiently on hardware emulation platforms.
• Debug and resolve issues related to AVIPs and transactors within the emulation environment.
• Lead bring-up and setup of emulation platforms (Zebu) for verification runs.
• Collaborate with RTL designers, verification, and emulation infrastructure teams to ensure high coverage.
• Troubleshoot test failures on emulators and provide feedback to design and DV teams.
• Release validated emulation cutdowns and support SW debugging.
• Work with SOC designers, verification, systems and software teams to achieve pre-silicon goals.

Skills

Emulation Prototyping

Zebu

SOC

Debugging AVIPs

Transactors

SystemVerilog

UVM

Python

Perl

Shell

Tools

Synopsys Zebu

Verdi

DVE

Job description

Role1 : Emulation Prototyping Engineer

Location: Hyderabad

Exp: 5 to 9 Years

Skills: Emulation Prototyping, Zebu, SOC

Drive Mode : Check for F2F , If they not available will go for Virtual.

Job Description

• Own and bring up emulation cutdowns cutdowns for large SoC and IP blocks to improve emulation performance and turnaround time.
• Adapt and port test benches to run efficiently on hardware emulation platforms.
• Debug and resolve issues related to AVIPs and transactors within the emulation environment.
• Lead the bring-up and setup of emulation platforms ( Zebu) to ensure readiness for verification runs.
• Collaborate closely with RTL designers, verification, and emulation infrastructure teams to ensure high coverage and quality.
• Troubleshoot test failures on emulators and provide actionable feedback to design and DV teams.
• Release validated emulation cutdowns
• Help customize the SOC design for the FPGA/Emulation platform Duties include modeling, debugging, creating and running validation tests, as well as supporting SW debugging
• Work with SOC design engineers, verification, systems and software team to achieve pre-silicon emulation and prototyping goals

Experience

• Hands-on experience with Synopsys Zebu emulators.
• Strong skills in debugging and developing AVIPs and transactors.
• Proficiency in SystemVerilog, UVM, and scripting languages such as Python, Perl, and Shell.
• Solid understanding of SoC architecture, verification methodologies, and hardware/software co-debugging.
• Experience with waveform analysis tools (Verdi, DVE).
• Ability to analyze, reduce, and optimize test cases while maintaining coverage and validity.
• Excellent problem-solving and communication skills, with a collaborative mindset.