Emulation Prototyping Engineer

CScale; Bengaluru; On-site; INR 4,000,000 - 6,000,000; Full time

Job summary

CScale is seeking an Emulation Lead to drive pre-silicon validation and performance analysis of complex Data Center SoCs using hardware emulation platforms. You will architect emulation strategies, build scalable environments, and enable workloads representative of real data center use cases.

The role involves integrating IPs and subsystems, bringing up platforms, and collaborating with verification, firmware, software, and architecture teams to ensure robust tape-out readiness.

Qualifications

• Experience with emulation-based pre-silicon validation for data-center SoCs.
• Proficiency in C/C++ and RTL partitioning for emulation.
• Experience with large-scale SOCs/IPs on emulators.
• Familiarity with virtual models and FPGA prototyping.

Responsibilities

• Define emulation methodology for data center SoCs with CPU, NOC/Crossbar, Ethernet and high-speed IOs.
• Develop partitioning strategies and set up emulation environments (Palladium, Veloce, ZeBu) and partition RTL.
• Port large-scale SoCs/IPs onto emulators, bring up platform and debug interfaces.
• Integrate and develop synthesizable monitors/checkers, VIP transactors,NOCbridges (MAC/PHYDDR).
• Emulation prototyping forboot loader bring-up, SoC configuration,firstpower-on sequences, clock/reset validation, strap/fuse programming
• Own stress testing and completeness of data path includingEthernet PHY/MAC link bring-up, loopbacktests;validateDMA descriptors, interrupts
• Automate emulation regression flows using scripting (TCL, Python, Perl) andoptimize forcoverage and debug time.
• Collaborate closely with verification, firmware, software, architecture teams for pre-silicon validation and bring-up.

Skills

emulation platforms

C/C++

RTL partitioning

bootloader bring-up

FPGA prototyping

Tools

Cadence Palladium

Synopsys ZeBu

Mentor Veloce

Job description

CScale is a startup backed by Sutter Hill Ventures and Atreides Capital - headquartered in Palo Alto, CA. Our executive team has a demonstrated track record of building and scaling category-defining semiconductor and infrastructure businesses at companies like Broadcom, Lumentum, Tesla, Apple, Samsung, Intel, and VMware.

CScale is developing next-generation optical semiconductor solutions for the AI infrastructure market, focused on enabling true “scale-up” architectures. Our mission is to replace traditional copper interconnects with advanced fiber-optic technologies that overcome the limitations of existing optics solutions and architectures.

Role Summary

The Emulation Leadis responsible fordriving pre-silicon validation and performance analysis of complex Data Center SoCs using hardware emulation platforms. This role ensures early software bring-up, system-level validation, and debug of critical features before tape-out. The position involves architecting emulation strategies, building scalable environments, integrating IPs and subsystems, and enabling workloads representative of real data center use cases.

Key Responsibilities

• Define emulation methodology for data center SoCs with CPU, NOC/Crossbar, Ethernet and high-speed IOs.
• Develop partitioning strategies& set up emulation environments (Palladium, Veloce,ZeBu)and partition RTL for hardware-based platforms.
• Port large-scale SoCs/IPs onto emulators, bring up the platform, and debug interface/functional issues involving firmware/hardware.
• Integrate and develop synthesizable monitors/checkers, VIP transactors,NOCbridges (MAC/PHYDDR)
• Emulation prototyping forboot loader bring-up, SoC configuration,firstpower-on sequences, clock/reset validation, strap/fuse programming
• Own stress testing and completeness of data path includingEthernet PHY/MAC link bring-up, loopbacktests;validateDMA descriptors, interrupts
• Automate emulation regression flows using scripting (TCL, Python, Perl) andoptimize forcoverage and debug time.
• Collaborate closely with verification, firmware, software, architecture teams for pre-silicon validation and bring-up.

Required Skills

• Strong exposure of emulation platformCadence Palladium, Synopsys ZeBu, Mentor Veloce
• Strongproficiencyin C/C++ and RTL partitioning for emulation platforms.
• Drive validation activitiesex:bootloader bring-up and executing real-world workloads.
• Emulation + virtual models, FPGA prototyping.

Added Advantage

• Understanding of System Verilog/UVM, SVA, coverage-driven verification
• Python/TCL scripting experience and post-silicon bring-up