DFT Engineer

Acme Services; Bengaluru; On-site; INR 1,500,000 - 2,100,000; Full time

Job summary

Acme Services in Bengaluru, India, seeks an experienced DFT Engineer to drive next-generation ASIC/SoC validation and testing across global teams.

The role covers Scan, MBIST, ATPG, DFT implementation and verification, with exposure to RTL, Synthesis, STA, P&R and manufacturing test flows.

You will collaborate with cross-functional teams to deliver robust semiconductor solutions and contribute to design for test strategy and defect diagnosis.

Qualifications

• Hands-on experience in DFT including Scan, MBIST, ATPG and DFT implementation.
• Strong knowledge of ASIC/SoC design and DFT methodologies.
• Experience with RTL, Synthesis, STA, P&R, verification and manufacturing test flows.
• Excellent problem solving and communication skills.

Responsibilities

• Hands-on experience in DFT, including Scan, MBIST, ATPG, and industry‑standard EDA tools.
• Strong knowledge of ASIC/SoC design, DFT methodologies, and the semiconductor development lifecycle.
• Experience with Mixed Signal IPs (PLL, SERDES, DDR) and silicon validation is preferred.
• Familiarity with RTL, Synthesis, STA, P&R, Verification, and manufacturing test flows.
• Excellent problem‑solving, communication, and stakeholder management skills.

Skills

DFT

Scan

MBIST

ATPG

ASIC/SoC design

RTL

Synthesis

STA

P&R

Verification

manufacturing test flows

communication skills

stakeholder management

Tools

EDA tools

Job description

Hiring experienced DFT Engineers - Leading Global semiconductor Design Organization

Experience: 4 to 12 Years

We are looking for an experienced DFT Engineer to work on next-generation ASIC/SoC designs. The role involves Scan, MBIST, ATPG, DFT implementation, and verification, while collaborating with global engineering teams to deliver robust and high-quality semiconductor solutions.

Key Responsibilities:

• Hands‑on experience in DFT, including Scan, MBIST, ATPG, and industry‑standard EDA tools.
• Strong knowledge of ASIC/SoC design, DFT methodologies, and the semiconductor development lifecycle.
• Experience with Mixed Signal IPs (PLL, SERDES, DDR) and silicon validation is preferred.
• Familiarity with RTL, Synthesis, STA, P&R, Verification, and manufacturing test flows.
• Excellent problem‑solving, communication, and stakeholder management skills.