DFT Engineer

Larsen & Toubro

Bengaluru

On-site

INR 300,000 - 500,000

Full time

14 days+

Get more replies from employers

Send a job-specific resume in minutes.

Job summary

A leading semiconductor company in Bengaluru is seeking an entry-level DFT engineer to implement and analyze various Design for Testability techniques, such as Memory Built-In Self-Test and Boundary Scan. The role requires debugging capabilities and familiarity with semiconductor technology. This is a full-time position within the Engineering and IT function, offering a chance to innovate in a cutting-edge field.

Qualifications

  • Knowledge of DFT techniques such as MBIST and BSCAN insertion.
  • Ability to debug DFT-related issues.
  • Familiarity with semiconductor technology nodes.

Responsibilities

  • Implement various DFT techniques including MBIST, BSCAN, and BIST.
  • Conduct DFT simulations and analyze results.
  • Debug and resolve DFT-related issues.

Skills

Memory Built-In Self-Test (MBIST)
Boundary Scan (BSCAN)
Logic Built-In Self-Test (BIST)
Analog BIST

Job description

Purpose of the Role

The Design for Testability (DFT) engineering organization at L&T Semiconductor Technologies (LTSCT) pioneers innovative methods and technologies in the areas of DFT architecture, verification, and post-silicon bring-up of state‑of‑the‑art semiconductor chips such as System on a Chip (SoCs), developed using the latest semiconductor technology nodes.

Areas of Responsibilities

Implement various DFT techniques, including:

  • Memory Built-In Self-Test (MBIST) insertion.
  • Compressor-based scan chain insertion.
  • Boundary Scan (BSCAN) structure insertion compliant with IEEE 1149.1 and 1149.6 standards.
  • Logic Built-In Self-Test (BIST) for self-test capability.
  • Analog BIST implementation for selected analog blocks, such as PLLs, ADCs, and DACs.
  • IO Built-In Self-Test (IOBist) methods for IO structures of SoCs.

Conduct DFT simulations and analyze results to ensure comprehensive test coverage and high quality.

Debug and resolve DFT-related issues throughout the design process.

Job Details
  • Seniority level: Entry level
  • Employment type: Full-time
  • Job function: Engineering and Information Technology
  • Industry: Executive Offices
Get your free, confidential resume review.
or drag and drop your file here.
Similar jobs

Similar jobs worth comparing

Sr. DFT Engineer
Sr. DFT Engineer

NXP Semiconductors • Maharashtra

On-site
INR 2,500,000 - 5,000,000
DFT Engineer
DFT Engineer

Erbity • Bengaluru

On-site
INR 1,200,000 - 1,800,000
DFT Engineer
DFT Engineer

Erbity • Dadri

On-site
INR 1,800,000 - 2,800,000
DFT Engineer
DFT Engineer

Erbity • Chennai District

On-site
INR 1,000,000 - 1,800,000
DFT Engineer
DFT Engineer

Erbity • Maharashtra

On-site
INR 1,800,000 - 3,000,000
Design-for-Test (DFT)
Design-for-Test (DFT)

Cyient • Bengaluru

On-site
INR 900,000 - 1,200,000
DFT Engineer
DFT Engineer

Capgemini Engineering • Bengaluru

On-site
INR 800,000 - 1,200,000
Dft Design Engineer
Dft Design Engineer

Sykatiya Technologies • Bengaluru

On-site
INR 900,000 - 1,500,000
DFT Engineer
DFT Engineer

Capgemini Engineering • Bengaluru

On-site
INR 800,000 - 1,200,000
DFT-MBIST Engineer
DFT-MBIST Engineer

Proxelera • Bengaluru Urban

On-site
INR 1,200,000 - 1,800,000