Design Verification Engineer

Capgemini Engineering; Bengaluru; On-site; INR 1,000,000 - 1,500,000; Full time

Job summary

A leading engineering services firm is looking for an Associate talent acquisition professional in Bengaluru, India. The ideal candidate has 5+ years of total experience, including 3+ years in SOC GLS and expertise in debugging, SV/UVM, and EDA tools like Synopsys Verdi and Cadence NC Sim. A Bachelor's or Master's degree in Electrical or Computer Engineering is required. This full-time role involves engineering and IT functions in an innovative environment.

Qualifications

• 5+ years of total experience with SOC GLS of at least 3 years.
• Hands-on experience in GLS (Zero Delay, SDF, PAGLS).
• Excellent debugging skills and proficiency in fixing issues.

Skills

Debugging skills

Knowledge in SV/UVM

Experience with EDA tools

Understanding of SOC Architecture

Education

Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field

Tools

Synopsys Verdi

Cadence NC Sim

Job description

Talent Acquisition @ Capgemini Engineering | MBA in HR

We are looking for more than 5 years of experience.

Job Description

• Total experience (4-7 years) with SOC GLS experience of minimum 3+ years
• Hands on experience in GLS (Zero Delay, SDF, PAGLS)
• Excellent debugging skills and fixing issues
• Knowledge in SV/UVM and test bench flow
• Good experience in EDA tools such as Synopsys Verdi, Cadence NC Sim.
• Understanding of SOC Architecture

Education Qualification:

Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field

Seniority level

• Associate

Employment type

• Full-time

Job function

• Engineering, Information Technology, and Other

Industries

• Engineering Services, IT Services and IT Consulting, and Semiconductor Manufacturing

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