Verification Engineer (GLS)

Modernize Chip Solutions (MCS); Hyderabad; On-site; INR 900,000 - 1,300,000; Full time

Job summary

Modernize Chip Solutions (MCS) in Hyderabad is seeking a Verification Engineer (GLS) with 3–5 years of experience to design and verify complex hardware blocks using gate-level GLS techniques. The candidate will work on GLS simulations, debugging, and failure analysis to ensure timing closure and reliability.

Applicants should have strong Verilog/SystemVerilog skills and hands-on GLS experience with timing concepts and SDF annotation. Immediate to 15 days notice period applies.

Qualifications

• Strong experience in Design Verification (DV)
• Hands-on experience in Gate-Level Simulation (GLS)
• Strong knowledge of Verilog and SystemVerilog
• Experience in simulation, debugging, and failure analysis
• Good understanding of timing concepts and SDF annotation
• Strong debugging and problem-solving skills
• Min 3 projects in GLS

Job description

Job Role: Verification Engineer (GLS)

Experience: 3–5 Years

Location: Hyderabad

Notice Period: Immediate to 15 Days only

Mandatory Skills

• Strong experience in Design Verification (DV)
• Hands-on experience in Gate-Level Simulation (GLS)
• Strong knowledge of Verilog and System Verilog
• Experience in simulation, debugging, and failure analysis
• Good understanding of timing concepts and SDF annotation
• Strong debugging and problem-solving skills
• Min 3 projects in GLS