GFX IP Verification Engineer

ACL Digital; Bengaluru; On-site; INR 1,000,000 - 1,500,000; Full time

Job summary

A leading semiconductor company in Bengaluru is seeking professionals with 4+ years of design verification experience. The role involves tasks such as ramping up on GFx IP, debugging test cases, and performing coverage analysis in a mixed language environment. Familiarity with PSS and strong C++ skills are desirable. This is a full-time position at the mid-senior level.

Qualifications

• 4+ years of design verification experience.
• Experience in debugging mixed language environments (C++/SV/UVM).
• Good knowledge of C++ is desirable.
• Familiarity with PSS is desirable.

Responsibilities

• Ramp up on the GFx IP and the verification infrastructure.
• Debug C++ based test cases using logs and waveforms.
• Regression debug and root cause, raise JIRAs and verify the fixes.
• Coverage analysis.
• Port C++ tests to PSS.
• Debug and fix the PSS tests to have the same result as C++ tests.

Skills

Design verification experience

Debugging mixed language environments

C++ proficiency

Familiarity with PSS

Job description

Hiring Expertise/ Leaders for VLSI/ Semiconductors!

• Ramp up on the GFx IP and the verification infrastructure.
• Debug C++ based testcases using logs and waveforms.
• Regression debug and root cause, raise JIRAs and verify the fixes
• Coverage analysis.
• Port C++ tests to PSS.
• Debug and fix the PSS tests to have the same result as C++ tests.
• 4+ years of design verification experience.
• Experience in debugging mixed language environments (c++/sv/uvm).
• Good knowledge of c++ is desirable.
• Familiarity with PSS is desirable.

Experience: 4+ Years

Notice Period: Less than 30 days.

Seniority level

• Mid-Senior level

Employment type

• Full-time

Job function

• Industries: Semiconductor Manufacturing

Referrals increase your chances of interviewing at ACL Digital by 2x