CPU Verification Engineer / Lead

SmartSoC Solutions Pvt Ltd; Bengaluru; On-site; INR 3,000,000 - 5,200,000; Full time

Job summary

SmartSoC Solutions Pvt Ltd in Bengaluru (INDIA) seeks a Senior Verification Engineer to lead CPU/core verification using SystemVerilog and UVM. You will design verification plans, build testbenches, and develop constrained-random tests to validate complex CPUs and IP blocks.

Ideal candidates will have 5+ years in CPU/SoC verification, strong scripting skills, and familiarity with RISC-V/ARM/MIPS architectures.

Qualifications

• Bachelor’s degree in Electronics/Electrical/Computer Engineering or related field.
• 5+ years of design verification experience in CPU/IP/SoC.
• Hands-on with SystemVerilog, UVM, and constrained random verification.
• Familiarity with CPU architectures such as RISC-V, ARM, or MIPS.
• Strong scripting in Python, Perl, or Shell.
• Excellent analytical and problem-solving skills.
• Strong written and verbal technical communication skills.
• Self-motivated, collaborative team player who can contribute to project goals.

Responsibilities

• Perform functional verification of CPU cores and related subsystems.
• Understand and interpret microarchitectural specifications to develop verification strategies.
• Develop and execute verification plans, including testbench creation and test case development.
• Write directed and constrained random test cases in System Verilog, C, and Assembly.
• Utilize UVM-based environments for coverage-driven verification.
• Analyze coverage reports and assist in closing coverage gaps.
• Automate regression and verification flows using scripting languages such as Python, Perl, or Shell.
• Collaborate with senior engineers and architects to ensure design quality and performance.
• Perform all activities in a safe and responsible manner and support all Environmental, Health, Safety & Security requirements and programs.

Skills

Testbench development

Constrained random verification

Python scripting

Problem solving

Team collaboration

Education

Bachelor’s degree in Electronics/Electrical/Computer Engineering

Tools

SystemVerilog

UVM

ARM/RISC-V knowledge

Job description

• Perform functional verification of CPU cores and related subsystems.
• Understand and interpret microarchitectural specifications to develop effective verification strategies.
• Develop and execute verification plans, including testbench creation and test case development.
• Write directed and constrained random test cases in System Verilog, C, and Assembly.
• Utilize UVM-based environments for coverage-driven verification.
• Analyze coverage reports and assist in closing coverage gaps.
• Automate regression and verification flows using scripting languages such as Python, Perl, or Shell.
• Collaborate with senior engineers and architects to ensure design quality and performance.

Other Responsibilities

• Perform all activities in a safe and responsible manner and support all Environmental, Health, Safety & Security requirements and programs.

Required Qualifications

• Bachelor’s degree in Electronics/Electrical/Computer Engineering, Computer Science, or related field.
• 5+ years of experience in design verification, preferably in CPU, IP or SoC verification.
• Hands-on experience with System Verilog, UVM, and constrained random verification.
• Familiarity with CPU architectures such as RISC-V, ARM, or MIPS.
• Basic understanding of cache and coherency concepts.
• Strong scripting skills in Python, Perl, or Shell.
• Excellent analytical and problem-solving skills.
• Proven written and verbal technical communication skills.
• Self-motivated, collaborative team player able to broadly contribute project goals.

Preferred Qualifications

• Exposure to RISC-V architecture.
• Knowledge of interconnect protocols like AXI, ACE, or CHI.
• Experience with FPGA prototyping or emulation platforms.