Competency management

Neurealm; Ernakulam; On-site; INR 1,800,000 - 2,600,000; Full time

Job summary

Neurealm is seeking a Learning & Capability Development Lead for its Semiconductor BU to manage and continuously enhance technical capability development frameworks across ASIC Design, Design Verification, DFT, and Physical Design.

The role drives learning paths, training programs, internal projects, and competency-building initiatives while partnering with engineering leaders, SMEs, and talent acquisition to ensure programs stay relevant to evolving customer needs and industry practices.

Qualifications

• Good understanding of semiconductor design and development flows.
• Hands‑on exposure to one or more of ASIC Design, Design Verification, DFT, or Physical Design.

Responsibilities

• Own and manage learning and competency development programs across ASIC Design, Design Verification, DFT, and Physical Design.
• Coordinate with SMEs and engineering leaders to validate content and keep learning paths current.
• Track training completion, certifications, and deployment readiness metrics across the BU.

Skills

Domain knowledge

Program management

Learning & capability development

Job description

About The Role

The Learning & Capability Development Lead will be responsible for managing and continuously enhancing the Semiconductor BU’s technical capability development framework. This role owns existing learning paths, training programs, internal projects, and competency-building initiatives across ASIC Design, Design Verification, DFT, and Physical Design domains.

Experience Required

Location

• Chennai, Tamil Nadu, India (WAC_007)
• Bangalore, Karnataka, India (WAC_003)
• Kochi, Kerala, India (WAC_004)

Job Summary

Learning & Capability Development Lead

Semiconductor Business Unit

About The Role

The Learning & Capability Development Lead will be responsible for managing and continuously enhancing the Semiconductor BU’s technical capability development framework. This role owns existing learning paths, training programs, internal projects, and competency-building initiatives across ASIC Design, Design Verification, DFT, and Physical Design domains.

Lead will collaborate closely with engineering leaders, subject matter experts (SMEs), project teams, and talent acquisition to ensure training programs remain relevant to evolving business and customer requirements while driving workforce readiness and continuous upskilling across the BU.

Key Responsibilities

• Learning Program Ownership
• Own and manage learning and competency development programs across ASIC Design, Design Verification, DFT, and Physical Design.
• Ensure effective execution of fresher training, lateral upskilling, and deployment readiness programs.
• Drive continuous improvement of learning effectiveness, program quality, and measurable outcomes.
• Learning Path Enhancement
• Review and enhance existing learning paths based on project requirements, customer demands, emerging technologies, and delivery team feedback.
• Identify skill gaps and recommend new training modules, hands‑on projects, and assessments to address them.
• Internal Project & Hands‑On Learning Management
• Manage project-based learning initiatives including IP- and SoC-level training projects.
• Ensure training projects remain aligned with current industry practices and customer expectations.
• Coordinate with SMEs/Mentors for effective execution of internal projects.
• Stakeholder & SME Engagement
• Collaborate with domain experts and technical leaders to validate training content, update learning paths, and support capability-building initiatives.
• Serve as the central coordinator for all capability development activities across the Semiconductor BU.
• Learning Operations & Governance
• Track training completion, assessments, certifications, and deployment readiness metrics across the BU.
• Maintain learning repositories, course structures, and training documentation in an organized and accessible manner.
• Provide periodic capability reports and training effectiveness reviews to BU leadership.
• Strategic Capability Development
• Support new capability initiatives in areas such as AI-assisted VLSI work flow, RISC-V, Functional Safety, and Advanced Verification Methodologies.
• Drive adoption of new learning methodologies, tools, and capability-building frameworks to keep the BU ahead of industry trends.

Required Skills & Competencies

Domain Knowledge

• Good understanding of semiconductor design and development flows.
• Hands‑on exposure to one or more of the following disciplines: ASIC Design, Design Verification, DFT, or Physical Design.

Program Management

• Demonstrated ability to manage and drive organization-wide learning initiatives end-to-end.
• Experience coordinating across multiple stakeholders, engineering leaders, and SMEs.
• Strong planning, tracking, and execution skills with attention to detail.

Learning & Capability Development

• Understanding technical learning frameworks, competency models, and curriculum design.
• Ability to assess training effectiveness and translate findings into actionable improvements.
• Prior experience managing learning content, technical academies, or structured training programs is an advantage.