CAD Layout Automation Engineer

Connectpro Management Consultants Private Limited; Hyderabad; On-site; INR 800,000 - 1,500,000; Full time

Job summary

An established industry player is seeking a skilled Computer Aided Design Engineer with extensive experience in layout automation and physical verification. This role involves customizing design environments and enhancing productivity through innovative methodologies. The ideal candidate will have a strong background in semiconductor manufacturing, with proficiency in industry-standard tools like Cadence Virtuoso and Synopsys Custom Compiler. Join a dynamic team where your problem-solving skills and attention to detail will contribute to cutting-edge projects in a collaborative environment. This is a fantastic opportunity to make a significant impact in a forward-thinking company.

Qualifications

• 8+ years of experience in layout automation and physical verification.
• Experience with place and router flows for custom memory layouts.

Responsibilities

• Customize design environments and automation methodologies.
• Analyze and debug DRC, ERC, LVS, DFM issues.

Skills

Layout automation

Physical Verification

Problem-solving skills

Programming fundamentals

Attention to detail

Education

Bachelor's degree in Electronics

Master's degree in Electrical Engineering

Tools

Cadence Virtuoso

Synopsys Custom Compiler

Pulsic Unity

Totem/VoltusXFA/XA

Linux

Job description

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• 8+ years of experience in Layout automation, Physical Verification, or related domains.
• Experience in customizing a design environment, automation methodologies and utilities to increase memory layout productivity.
• Working experience in Place and Router flows for custom memory layouts with industry standard tools like Cadence Virtuoso, Synopsys Custom Compiler, Pulsic Unity, Itools etc.
• Working experience in PDN analysis tools like Totem/VoltusXFA/XA is preferable.
• Working experience of Physical Verification flow and analyzing/debugging DRC, ERC, LVS, DFM, Antenna Calibre/ICV rule deck issues is plus.
• Good understanding of advanced CMOS process manufacturing and layout design rules, EMIR, RC-Extraction, ESD, and Latch-up.
• Good understanding of programming fundamentals, as well as exposure to various programming languages including Skill (Cadence), Perl, Python, Tcl.
• Working knowledge of Linux is a must.
• Excellent problem-solving skills with attention to detail.
• Ability to work in a dynamic environment.
• Proficiency in working effectively with global teams and stakeholders.

Education:

• A bachelor’s or a master’s degree in Electronics, Electrical or Computer Engineering.

Seniority level

• Seniority level

  Mid-Senior level

Employment type

• Employment type

  Full-time

Job function

• Job function

  Design

• Industries

  Semiconductor Manufacturing

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