Analog Layout Engineer

Modernize Chip Solutions (MCS); Hyderabad; On-site; INR 1,500,000 - 2,700,000; Full time

Job summary

Modernize Chip Solutions (MCS) in Hyderabad seeks an experienced Analog Layout Engineer to join our semiconductor team. You will contribute to design and development of analog, mixed-signal and custom digital blocks, working on advanced nodes and full-chip integration.

The role requires hands-on Cadence XL/EXL, Mentor Calibre DRC/LVS, and strong LVS/DRC/DFM knowledge, with BE/M.Tech in Electronics or VLSI. You will collaborate with layout teams to deliver high-quality blocks on schedule.

Qualifications

• Strong experience in Analog Layout with advanced technology nodes.
• Experience with TSMC 5nm, 3nm and below is preferred; Samsung/GlobalFoundries also considered.
• BE/M.Tech in Electronics, VLSI or related engineering discipline.
• Hands-on experience with Regulators, Charge Pumps and Power Management.

Responsibilities

• Design and development of Analog, Mixed-Signal and Custom Digital blocks.
• Support full-chip level integration activities.
• Independently execute and deliver high-quality block-level layouts within timelines.
• Mentor Graphics Calibre DRC/LVS verification flows experience required.

Skills

Analog Layout

Cadence XL/EXL

LVS

DRC

DFM

Power Management

Block-level Layout

Communication

Team Collaboration

Education

BE in Electronics or related

M.Tech in Electronics / VLSI

Tools

Mentor Calibre

Cadence XL/EXL

Job description

Hiring: Analog Layout Engineer | Hyderabad

Location: Hyderabad, Telangana, India

Work Mode: On-site

Industry: Semiconductor Manufacturing

Experience: 4–6 Years

Notice Period: Immediate to 15 Days

About This Job

Modernize Chip Solutions (MCS) is looking for experienced Analog Layout Engineers to join our semiconductor engineering team.

Key Responsibilities & Requirements

• Strong experience in Analog Layout with advanced technology nodes.
• Experience with TSMC 5nm, 3nm and below is preferred.
• Experience with Samsung/GlobalFoundries is also considered.
• Design and development of Analog, Mixed-Signal and Custom Digital blocks.
• Support full-chip level integration activities.
• Hands-on experience with analog blocks such as Regulators, Charge Pumps and Power Management.
• Ability to independently execute and deliver high-quality block-level layouts within timelines.
• Expertise in Cadence XL/EXL for layout execution.
• Strong knowledge of LVS, DRC, DFM, Antenna and EMIR verification flows.
• Mentor Graphics Calibre DRC/LVS experience is mandatory.
• HBM experience is a strong plus.
• BE/M.Tech in Electronics, VLSI or related engineering discipline.
• Good communication and collaboration skills.