Analog Layout Engineer | 4+ Yrs

leadIC Design Pvt Ltd; Bengaluru; On-site; INR 1,800,000 - 3,000,000; Full time

Job summary

LeadIC Design is seeking an experienced Analog Layout Engineer in Bengaluru to translate analog/mixed-signal schematics into high-quality layouts and ensure rule compliance.

You will work with circuit engineers to optimize noise, mismatch and area, perform floorplanning and routing for critical circuits, and participate in signoff checks and layout automation initiatives.

Qualifications

• Strong expertise in analog/mixed-signal layout and floorplanning.
• Hands-on experience with DRC, LVS, ERC sign-off and physical verification.
• 4+ years of analog layout experience in semiconductor/VLSI.
• Bachelor’s or Master’s degree in Electronics, Electrical Engineering, VLSI or related field.

Responsibilities

• Translate analog/mixed-signal schematics into high-quality physical layouts.
• Perform floorplanning, device placement and routing of critical analog circuits.
• Optimize for noise, mismatch, parasitics, and area.
• Run and analyze DRC/LVS/ERC signoff flows and document revisions.
• Contribute to layout best practices and automation; participate in design reviews.

Skills

Layout design expertise

Analog/mixed-signal intuition

Collaboration and ownership

Attention to detail

Education

Bachelor’s or Master’s degree in Electronics/EE/VLSI

Tools

Cadence Virtuoso

Mentor Graphics

Synopsys tools

Job description

Company Description

LeadIC Design accelerates semiconductor innovation through full-stack VLSI engineering expertise, supporting the complete chip development lifecycle for global semiconductor companies. Founded in 2018, the company has grown into a trusted partner known for deep technical capability, strong execution ownership, and flexible engagement models. With engineering teams across India and Canada, LeadIC delivers high-quality, product-focused design services across custom, memory and analog layout, analog/mixed-signal design, digital design, verification, and physical implementation. The organization emphasizes an engineering culture built on ownership, quality-driven execution, and scalable offshore teams that integrate seamlessly with client roadmaps. Long-term relationships with leading semiconductor firms reflect LeadIC’s reliability and commitment to accelerating silicon success.

Role Description

This is a full-time, on-site Analog Layout Engineer role based in Bengaluru. The Analog Layout Engineer will be responsible for translating analog and mixed-signal circuit schematics into high-quality physical layouts, ensuring compliance with design rules, matching requirements, and performance targets across process technologies. Day-to-day tasks include floorplanning, device placement, routing of critical analog circuits, and optimization for noise, mismatch, parasitics, and area. The role involves close collaboration with circuit design engineers to review schematics, understand design intent, and iterate on layout improvements based on simulation feedback. The engineer will also run and analyze physical verification checks (DRC, LVS, ERC, and related signoff flows), debug issues, and maintain thorough documentation of layout revisions and methodologies. Participation in design reviews, adherence to internal quality processes, and contribution to layout best practices and automation are expected.

Qualifications

• Strong expertise in Layout Design for analog and mixed-signal ICs, including device placement, routing, floorplanning, and layout optimization.
• Solid understanding of Circuit Design concepts, especially Analog and Analog Circuits, with the ability to interpret schematics and design constraints.
• Hands-on experience with Physical Verification flows, including DRC, LVS, ERC, and familiarity with signoff methodologies.
• Proficiency with industry-standard EDA tools for analog layout and verification (e.g., Cadence Virtuoso, Mentor/Siemens, Synopsys tools or similar).
• Knowledge of CMOS process technologies, device physics fundamentals, matching techniques, and layout strategies for low-noise and high-precision circuits.
• Minimum 4+ years of relevant experience in analog layout engineering within the semiconductor or VLSI domain.
• Bachelor’s or Master’s degree in Electronics, Electrical Engineering, VLSI, or a closely related discipline.
• Ability to work collaboratively with cross-functional design teams, strong attention to detail, and a quality-focused, ownership-driven mindset