AMS Verification Engineer (3+ Years Exp)

NovaRays Semi; Bengaluru; On-site; INR 1,200,000 - 1,800,000; Full time

Job summary

NovaRays Semi in Bengaluru is seeking an AMS Verification Engineer to build mixed-signal models and verify analog IPs. You will work closely with the analog design team to ensure high-quality verification results.

You will develop Verilog and Verilog-A models, run simulations with Spectre and Cadence tools, and perform UPF-based early verification on PCIe/UCIe/DDR interfaces. This role offers exposure to cutting-edge IP in a fast-growing company.

Qualifications

• Familiarity with Verilog and Verilog-A for model building.
• Working knowledge of Verilog-AMS and SVA.
• Experience with Spectre, CAD tools and UPF.
• Hands-on PCIe/UCIe/DDR PHY RX/TX experience.

Responsibilities

• Build AMS models by replacing behavioral models for data/clock lanes.
• Develop models using Verilog and Verilog-A.
• Perform AMS verification using Verilog-AMS and SVA.
• Run simulations using Spectre, Cadence ADE Explorer and Cadence Virtuoso.
• Carry out initial-stage mixed-signal verification using UPF.
• Collaborate with the analog circuit design team to address issues.

Skills

Verilog

Verilog-A

SVA

UPF

Spectre

Cadence tools

PCIe/UCIe/DDR

Tools

Cadence ADE Explorer

Cadence Virtuoso

Job description

NovaRays Semi is a Bengaluru-based Analog and Mixed-Signal IP design services company, founded by semiconductor industry veterans. We develop high-speed analog and interface IP (PCIe, UCIe, DDR and more) for leading semiconductor companies worldwide, and we are building our engineering team in Bengaluru.

About the role

We are looking for an AMS Verification Engineer to build AMS models and run mixed-signal verification for analog IPs, working closely with our analog circuit design team.

What you will do

• Build AMS models by replacing behavioral models (B-Mods) for selected data and clock lanes, to enable verification test execution and meet circuit design quality and performance goals
• Develop models using Verilog and Verilog-A
• Perform AMS verification using Verilog-AMS and SystemVerilog Assertions (SVA)
• Run simulations using Spectre, Cadence ADE Explorer and Cadence Virtuoso
• Carry out initial-stage mixed-signal verification using UPF
• Collaborate with the analog circuit design team to address complex issues and exchange inputs on simulation runtime

What you bring

• Familiarity with Verilog and Verilog-A for model building, RNM / wreal / SV-UDN
• Working knowledge of Verilog-AMS, SystemVerilog Assertions (SVA) and analog mixed-signal (AMS) verification
• Experience with Spectre, Cadence ADE Explorer and Cadence Virtuoso
• Experience with initial-stage mixed-signal verification using UPF
• Hands-on execution experience with PCIe, UCIe or DDR PHY RX/TX
• Work on high-complexity analog and mixed-signal IP at the start of a high-growth company
• Learn from a leadership team with decades of industry experience
• Help shape the team, processes and technology