Ams Verification Engineer

Object Technology Solutions; India; On-site; INR 1,200,000 - 1,800,000; Full time

Job summary

Object Technology Solutions is seeking a skilled DMS verification engineer to advance mixed-signal verification for complex SoCs. The role emphasizes SystemVerilog/UVM methodologies, and hands-on work with PLLs, USB, clock generators, and data converters.

You will work with mixed-signal simulators and flows, ensuring coverage-driven verification, regression management, and robust verification planning. Collaboration across multiple teams is essential for rapid issue closure.

Qualifications

• Strong expertise in DMS verification, SystemVerilog/UVM based verification.
• Experience with PLLs, USB, clock generators, power management circuits, ADC/DAC and mixed-signal interfaces.
• Understanding of analog concepts (noise, jitter, latency, settling time, calibration) from SoC verification perspective.
• Experience with mixed-signal simulators and flows (Xcelium AMS or equivalent).
• Strong experience in coverage-driven verification, regression management, assertion-based checks, and verification planning.
• Ability to debug complex analog-digital interactions and drive closure across teams.

Responsibilities

• Develop and implement verification plans for mixed-signal SoCs.
• Debug and validate analog-digital interactions and interfaces.
• Coordinate with multiple teams to drive closure of verification issues.

Skills

Digital Mixed-Signal Verification

SystemVerilog

UVM

Real Number Modeling

Tools

Xcelium AMS

Job description

Strong expertise in Digital Mixed-Signal Verification (DMS), SystemVerilog, UVM, and Real Number Modeling (RNM).

• Hands-on experience with PLLs, USB, clock generators, power management circuits, data converters (ADC/DAC), and mixed-signal interfaces.
• Experience in Schematic vs Model Validation, behavioral model development/correlation, and mixed-signal debug.
• Understanding of analog concepts including noise, jitter, latency, settling time, calibration, accuracy, and timing impacts from an SoC verification perspective.
• Experience with mixed-signal simulators and flows (Xcelium AMS or equivalent).
• Strong experience in coverage-driven verification, regression management, assertion-based checks, and verification planning.
• Ability to debug complex analog-digital interactions and drive closure across multiple teams.