Ams Verification Engineer

Cilicon Chip; Bengaluru; On-site; INR 2,500,000 - 5,000,000; Full time

Job summary

Cilicon Chip in Bengaluru is seeking an experienced AMS Verification Lead to guide analog/mixed-signal verification for complex IPs and SoCs. You will lead planning, testbench development, execution, debugging, coverage closure, and mentor a team of verification engineers.

The ideal candidate has strong SystemVerilog, UVM, Verilog-AMS, RNM, and analog/digital co-simulation expertise, and will collaborate with Analog, Digital, RTL, Physical Design and Validation teams to deliver high-quality

Qualifications

• AMS verification experience with analog and digital co-simulation.
• Experience leading verification teams.
• Strong knowledge of SystemVerilog, UVM, Verilog-AMS and RNM.
• Ability to drive verification planning, testbench development and closure.
• Proficiency with Cadence Xcelium, Spectre and Virtuoso AMS.

Responsibilities

• Lead AMS verification activities for analog and mixed-signal IPs and SoC designs.
• Develop verification plans, strategies and testbench architectures.
• Build and maintain AMS verification environments using SystemVerilog, UVM and Verilog-AMS.
• Develop Real Number Models (RNM) for faster digital-centric mixed-signal verification.
• Perform analog/digital co-simulation and debug complex interactions.
• Verify analog IPs such as ADC/DAC, PLL/DLL, LDO, oscillators and PMIC IPs.
• Drive functional and code coverage and verification closure.
• Collaborate with Analog, Digital, RTL, Physical Design and Validation teams.
• Lead technical discussions, review testbenches and mentor junior engineers.
• Track milestones and ensure quality deliverables.

Skills

AMS Verification

SystemVerilog

UVM

Verilog-AMS

RNM

Analog/Digital Co-simulation

Functional Coverage

Debugging

EDA Tools

Leadership

Education

Bachelor's or Master's degree in Electronics, Electrical Engineering or VLSI

Tools

Cadence Xcelium

Cadence Spectre

Cadence Virtuoso AMS

Job description

Hi all,

We are Hiring for the role #AMS Verification Engineer - Lead

Experience: 3 - 12 Years

Lead: 7 - 12 Years

Location: Bangalore

Notice Period: Immediate - 45 Days

Job Summary

We are looking for an experienced AMS Verification/ Lead AMS Verification Engineer to lead Analog and Mixed-Signal (AMS) verification activities for complex semiconductor IPs and SoC designs.

The ideal candidate should have strong expertise in AMS verification methodologies, SystemVerilog, UVM, Verilog-AMS, RNM (Real Number Modelling), and analog/digital co-simulation. The candidate will be responsible for verification planning, testbench development, execution, debugging, coverage closure, and leading a team of verification engineers.

Key Responsibilities

1. Lead AMS verification activities for analog and mixed-signal IPs and SoC-level designs.
2. Develop verification plans, test strategies and testbench architectures.
3. Build and maintain AMS verification environments using SystemVerilog, UVM and Verilog-AMS.
4. Develop and integrate Real Number Models (RNM) for faster digital-centric mixed-signal verification.
5. Perform analog/digital co-simulation and debug complex mixed-signal interactions.
6. Verify analog IPs such as:
   • ADC / DAC
   • PLL / DLL
   • LDO / Voltage Regulators
   • Oscillators
   • Bandgap References
   • Power Management IPs
7. Drive functional coverage, code coverage and verification closure.
8. Collaborate with Analog Design, Digital Design, RTL, Physical Design and Validation teams.
9. Lead technical discussions, review testbenches and mentor junior engineers.
10. Track project milestones, resolve technical challenges and ensure quality deliverables.

Mandatory Technical Skills

Skill

Expected expertise

AMS Verification

Strong hands-on experience

SystemVerilog

Advanced

UVM

Strong experience

Verilog-AMS

Hands-on knowledge

RNM

Real Number Modelling

Analog/Digital Co-simulation

Strong understanding

Functional Coverage

Coverage planning and closure

Debugging

Mixed-signal simulation debug

EDA Tools

Cadence Xcelium, Spectre, Virtuoso AMS

Leadership

Team mentoring and technical ownership

Good-to-Have Skills

• SystemVerilog Assertions (SVA)
• Python / Perl / Tcl scripting
• MATLAB / Simulink
• ADC, DAC, PLL and PMIC verification
• Mixed-signal SoC verification
• Experience with advanced semiconductor technology nodes

Candidate Profile

• Bachelor's or Master's degree in Electronics, Electrical Engineering or VLSI.
• 712 years of relevant semiconductor verification experience (suggested).
• Strong experience in AMS verification and digital verification methodologies.
• Experience leading verification teams and interacting with cross-functional stakeholders.
• Ability to independently drive verification from planning through sign-off.