AMS Verification Engineer

ACL Digital; Bengaluru; On-site; INR 1,800,000 - 2,400,000; Full time

Job summary

ACL Digital in Bengaluru is seeking an experienced Analog Mixed-Signal (AMS) Verification Engineer to drive verification strategies for AMS blocks and co-simulations in a fast-paced semiconductor environment.

You will develop testbenches, work with PLLs, ADCs/DACs, PMIC, and collaborate with design teams to close coverage and debug complex issues. 4+ years in AMS or Digital Design Verification is required.

Qualifications

• 4+ years of hands-on experience in Analog Mixed-Signal (AMS) or Digital Design Verification.
• Proficient in SystemVerilog, UVM, and modeling languages (Verilog-AMS, Verilog-A, SV-RNM).
• Familiarity with EDA tools such as Cadence Xcelium/Spectre or Synopsys VCS.

Responsibilities

• Drive AMS verification strategies, including development of complex testbenches and behavioral models.
• Work on mixed-signal co-simulations (AMS/DMS) and ensure functional and code coverage closure.
• Collaborate with design and architecture teams to resolve complex functional and performance issues.
• Contribute to verification planning, methodology definition, and execution at block or SoC level.

Skills

SystemVerilog

UVM

Verilog-AMS

Verilog-A

SV-RNM

Tools

Cadence Xcelium

Cadence Spectre

Synopsys VCS

Job description

Company: ACL Digital

Experience Required: 4+ Years

Notice Period: 15–30 Days

Are you ready to accelerate your career in the semiconductor industry? ACL Digital is hiring experienced Analog Mixed-Signal (AMS) Verification Engineers to work on high-impact projects with global technology leaders in Bangalore.

Key Responsibilities:

• Drive AMS verification strategies, including the development of complex testbenches and behavioral models.
• Work on mixed-signal co-simulations (AMS/DMS) and ensure functional and code coverage closure.
• Collaborate with design and architecture teams to resolve complex functional and performance issues.
• Contribute to verification planning, methodology definition, and execution at the block or SoC level.

Desired Qualifications:

• Experience: 4+ years of hands-on experience in Analog Mixed-Signal (AMS) or Digital Design Verification.
• Skills: Strong proficiency in SystemVerilog, UVM, and modeling languages (Verilog-AMS, Verilog-A, SV-RNM).
• Tooling: Familiarity with EDA tools such as Cadence Xcelium/Spectre, Synopsys VCS, or similar environments.
• Core Competency: Solid understanding of analog building blocks (e.g., PLLs, ADCs/DACs, PMIC).

What We Offer:

• Opportunity to work on next-generation silicon designs.
• Collaborative environment with top-tier global semiconductor teams.
• Growth and exposure to cutting-edge nodes and technologies.