AMS Verification Engineer (Analog) (IRT30ST RM 4304)

Source-Right; Pune District; On-site; INR 900,000 - 1,500,000; Full time

Job summary

Source-Right in Pune, India is seeking an AMS Verification Engineer (Analog) to design and verify AMS flows. You will develop simulation environments, create mixed-signal test cases, and collaborate with analog and digital design teams to ensure robust verification.

Strong fundamentals in analog or digital design, hands-on debugging, and knowledge of SystemVerilog or UVM are valued. Immediate joiners or those serving notice are welcome to apply.

Qualifications

• Strong fundamentals in analog or digital design and verification.
• Hands-on experience with simulation and debugging.
• Understanding of analog circuits and mixed-signal concepts.
• Ability to work across analog and digital domains.
• Knowledge of SystemVerilog or UVM is a plus.
• Basic scripting skills preferred.

Responsibilities

• Develop and maintain AMS verification flows and simulation environments.
• Create and execute mixed-signal test cases.
• Perform simulation debugging and failure analysis.
• Execute regressions and maintain verification documentation.
• Collaborate closely with analog and digital design teams.

Skills

AMS verification

Analog design

Digital design

Simulation

Debugging

Cross-domain work

SystemVerilog/UVM

Scripting

Job description

Position: AMS Verification Engineer (Analog) (IRT30ST RM 4304)

• Strong understanding of analog or digital design and verification fundamentals.
• Hands-on experience with simulation and debugging.
• Understanding of analog circuits and mixed-signal concepts.
• Ability to work effectively across analog and digital domains.
• Knowledge of SystemVerilog or UVM is a plus.
• Understanding of analog circuits or mixed-signal concepts preferred.
• Basic scripting skills preferred

Required Skills

• Strong understanding of analog or digital design and verification fundamentals.
• Hands-on experience with simulation and debugging.
• Understanding of analog circuits and mixed-signal concepts.
• Ability to work effectively across analog and digital domains.
• Knowledge of SystemVerilog or UVM is a plus.
• Understanding of analog circuits or mixed-signal concepts preferred.
• Basic scripting skills preferred

Key Responsibilities

• Develop and maintain AMS verification flows and simulation environments.
• Create and execute mixed-signal test cases.
• Perform simulation debugging and failure analysis.
• Execute regressions and maintain verification documentation.
• Collaborate closely with analog and digital design teams.

Who Should Apply?

• Engineers with strong fundamentals in analog or digital domains.
• Professionals interested in building expertise in AMS Verification.
• Candidates who can join immediately or are currently serving their notice period.