AMS Spice Verification:

Cyient Limited; Bengaluru; On-site; INR 1,700,000 - 2,600,000; Full time

Job summary

Cyient Limited in Bengaluru seeks a seasoned Analog/Mixed-Signal (AMS) engineer with 5+ years of industry experience in SPICE verification at block, subsystem, and chip-top levels. The role emphasizes strong fundamentals in analog design, mixed-signal architectures, and hands-on use of Cadence Virtuoso and SPICE simulators.

You'll collaborate with system architects, analog/digital designers, and DV teams to develop robust AMS testbenches, diagnose convergence issues, optimize runtimes, and push

Qualifications

• B.Tech/M.Tech with 5+ years of AMS SPICE experience.
• Deep understanding of analog design and mixed-signal architectures.
• Experience in verification planning and AMS SPICE testbench development.
• Proficiency with Cadence Virtuoso and SPICE simulators.

Responsibilities

• Under direct supervision, perform engineering work and applied research for new Integrated Chips.
• Contribute to Architectural, Logic, Circuit, Physical Design and Verification activities.
• Assist in Fabrication and Packaging processes of chips.

Skills

Analog design fundamentals

Mixed-signal architectures

AMS SPICE verification

Convergence debugging

Cross-functional teamwork

Problem solving

Debug & optimization

Education

B.Tech/M.Tech in relevant field

Tools

Cadence Virtuoso

SimVision

Verisium

Spectre

UltraSim

APS

Xcelium

DMSO

Job description

Requirements

• Education & Experience: B. Tech/M. Tech with 5+ years of industry experience in Analog/Mixed-Signal (AMS) SPICE simulation at block, subsystem, and chip-top levels.
• Technical Expertise: Strong understanding of analog design fundamentals and mixed-signal architectures, with exposure to complex SoC integrations involving Power Management, PLL/Synthesizers, ADC/DAC, Bandgap references, Oscillators/Clocking, SerDes, and related digital control systems.
• AMS Verification & Simulation: Proven experience in verification planning, AMS SPICE testbench development, and debugging complex convergence issues.
• EDA Tools Proficiency: Hands-on experience with Cadence Virtuoso for schematic capture and waveform analysis tools such as SimVision/Verisium.
• Simulation Tools: Expertise in SPICE/Fast-SPICE simulators (Spectre, UltraSim, APS, XPS) and digital simulators (Cadence Xcelium/DMSO).
• Test Development: Experience in developing robust, self-checking AMS SPICE testcases.
• Debug & Optimization Skills: Strong track record in resolving complex AMS simulation challenges, including environment/setup issues, runtime optimization, convergence at AMS boundaries, analog-digital integration, loading, and stability concerns.
• Collaboration: Ability to work effectively with cross-functional teams, including system architects, analog/digital design, and DV teams.
• Learning Agility & Problem Solving: Quick learner with strong analytical and problem-solving capabilities.

Personal Attributes

Self-motivated, proactive, and enthusiastic team player

Roles and Responsibilities

Under direct supervision, performs engineering work and applied research, development, and design of new Integrated Chips. Work includes Architectural Design, Logic Design, Circuit Design, Physical Design, Verification, Fabrication, Packaging of Chips.