STA Design Engineer - Low-Power ASIC Timing Closure

European Tech Recruit

Cork

On-site

EUR 70,000 - 110,000

Full time

6 days ago
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Job summary

European Tech Recruit is partnering with a global semiconductor leader to hire an STA Design Engineer in Cork, Ireland. You will conduct complex timing signoff for next-generation ASICs and SOCs, drive timing closure, and collaborate with RTL, Synthesis and Physical Design teams.

Responsibilities include evaluating timing on gate-level netlists, creating ECOs, and developing Python/TCL/Perl scripts to automate data mining and processing of timing and power data.

Qualifications

  • 4+ years of experience in Static Timing Analysis.
  • Expert proficiency in STA tools for hierarchical analysis in large SoCs.
  • Hands-on experience with ECO tools for timing closure.
  • Automation scripting with Python, TCL or Perl.
  • Strong knowledge of the complete ASIC design flow RTL-to-GDS.

Responsibilities

  • Perform STA and drive timing closure for complex cores and full-chip SOCs.
  • Evaluate block-level and top-level timing on gate-level netlists.
  • Provide feedback to RTL, Synthesis, and Physical Design teams to improve PPA.
  • Create and execute Timing ECOs to resolve critical timing violations.
  • Develop automation scripts for timing/power data mining and processing.

Skills

Static Timing Analysis
Python scripting
TCL scripting
Perl scripting
RTL-to-GDS understanding

Education

Bachelor's degree in Electrical/Computer Engineering or equivalent

Tools

PrimeTime
PrimeShield
Tempus
Tweaker
PrimeClosure
PTECO

Job description

European Tech Recruit is partnering with a global semiconductor leader to hire an STA Design Engineer in Cork, Ireland. You will conduct complex timing signoff for next-generation ASICs and SOCs, drive timing closure, and collaborate with RTL, Synthesis and Physical Design teams.

Responsibilities include evaluating timing on gate-level netlists, creating ECOs, and developing Python/TCL/Perl scripts to automate data mining and processing of timing and power data.

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