Senior Front-End Implementation Engineer (Staff) ASIC Timing

QUALCOMM, Inc.; Cork; Presencial; EUR 110.000 - 150.000; Jornada completa

Ventajas ofrecidas por este puesto de trabajo

Stock bonus

Leave maternity/paternity

Employee stock purchase

Pension scheme

Education assistance

Relocation support

Insurance (life/medical)

Wellbeing subsidies

Bike scheme

Employee clubs

Descripción de la vacante

QT Technologies Ireland Limited in Cork, Ireland is seeking a Front-End Implementation Engineer to create top-level timing constraints and perform physical synthesis. You will drive DFT, formal verification and ECOs to bridge RTL and physical design for Snapdragon SoCs in advanced process nodes.

Requires 5–10 years in ASIC design, Verilog RTL, TCL/Python scripting, and low-power checks. This role offers relocation support, benefits, and a dynamic, collaborative team environment.

Formación

• Bachelors/Masters in Electronics or Computer Engineering with 4+ years of ASIC related work.
• Experience in timing closure and TCL scripting for CAD flows.
• Knowledge of UPF and low power checks, formal verification, and STA.

Responsabilidades

• Develop top-level timing constraints and perform physical synthesis.
• Bridge RTL and physical design through formal verification and ECOs.
• Contribute to 4nm and below technology design flows in Cork.

Conocimientos

Logical/Physical synthesis

DFT implementation

Timing closure (STA)

Verilog RTL

UPF / Low power checks

TCL scripting

Python scripting

Formal verification

Educación

Bachelor's in Science/Engineering

Master's in Science/Engineering

PhD in Science/Engineering

Herramientas

TCL scripting

Python scripting

Descripción del empleo

QT Technologies Ireland Limited in Cork, Ireland is seeking a Front-End Implementation Engineer to create top-level timing constraints and perform physical synthesis. You will drive DFT, formal verification and ECOs to bridge RTL and physical design for Snapdragon SoCs in advanced process nodes.

Requires 5–10 years in ASIC design, Verilog RTL, TCL/Python scripting, and low-power checks. This role offers relocation support, benefits, and a dynamic, collaborative team environment.