Physical Design Engineer - (ASIC/CPU Team)

European Tech Recruit; Cork; On-site; EUR 90,000 - 120,000; Full time

Job summary

European Tech Recruit in Cork, Ireland, is seeking a CPU Physical Design Engineer to join the CPU Team. You will drive end-to-end ASIC development, from architecture and design to verification and implementation, collaborating with cross-functional teams.

The role requires a strong background in digital/analog IP, architecture definitions, and hands-on experience with industry tools like RTL-to-GDS and Virtuoso. You will mentor junior engineers and contribute to detailed technical documentation.

Qualifications

• Bachelor’s degree in Engineering, Computer Science, or related field with 5+ years of ASIC experience.
• OR Master’s with 4+ years in ASIC design, verification, validation, or integration.

Responsibilities

• Lead the design and development of digital and/or analog IP to meet performance, quality, and power targets.
• Define architectures, circuit specifications, and simulations based on system-level requirements.
• Collaborate with hardware, software, and product teams to align on implementation strategies.
• Manage the full ASIC development flow: high-level design, synthesis, layout, timing, and verification.
• Use industry-standard tools (e.g., RTL-to-GDS, Virtuoso) for advanced block/SoC or IC package design.
• Create and review detailed technical documentation; provide mentorship to junior engineers.

Skills

ASIC experience

Synthesis

Layout design

Verification

Leadership

Education

Bachelor's degree in Engineering/CS

Master's degree in Electrical/CS

Tools

RTL-to-GDS

Virtuoso

Job description

CPU Physical Design Engineer

A fantastic career opportunity for a skilled Physical Design Engineer to join a Global Semiconductor Leader, working alongside their CPU Team in Cork, Ireland.

In this role you will help drive the development of high-performance, low-power IP (block/SoC) for next-generation products. This role involves end-to-end ASIC development, from architecture and design to verification and implementation, in close collaboration with cross-functional teams.

Key Responsibilities:

• Lead the design and development of digital and/or analog IP to meet performance, quality, and power targets.
• Define architectures, circuit specifications, and simulations based on system-level requirements.
• Collaborate with hardware, software, and product teams to align on implementation strategies.
• Manage the full ASIC development flow: high-level design, synthesis, layout, timing, and verification.
• Use industry-standard tools (e.g., RTL-to-GDS, Virtuoso) for advanced block/SoC or IC package design.
• Create and review detailed technical documentation; provide mentorship to junior engineers.

Minimum Qualifications:

• Bachelor’s degree in Engineering, Computer Science, or related field with 5+ years of ASIC experience
• OR Master’s with 4+ years in ASIC design, verification, validation, or integration

Preferred Qualification's

• Master’s degree in Electrical or Computer Engineering or Computer Science
• 6+ years of ASIC experience
• 3+ years with architecture/design tools, scripting languages, and verification methods
• 2+ years of experience engaging with senior leadership

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