Senior ASIC Verification Architect - IP & DDR/PCIe Lead

Synopsys Inc; Dublin; On-site; EUR 70,000 - 110,000; Full time

Job summary

Synopsys Ireland is seeking an experienced ASIC Digital Verification Engineer to drive verification environments for Interface IP protocols such as DDR, PCIe, CXL and Ethernet. You will develop testbenches using SystemVerilog and UVM, collaborate with design teams, and mentor junior engineers.

Joining our Dublin team, you will contribute to high-quality silicon designs and IP products, ensuring robust verification coverage and driving process improvements across the team.

Qualifications

• Extensive experience in ASIC digital verification, specifically with Interface IP protocols (e.g., DDR, PCIe, CXL, Ethernet).
• Proficiency in SystemVerilog and UVM methodologies.
• Strong understanding of digital design and verification concepts.
• Experience with simulation tools such as VCS or ModelSim.
• Excellent problem-solving skills and attention to detail.

Responsibilities

• Designing and implementing verification environments to ensure the correctness of Interface IP protocols.
• Creating and executing detailed test plans to verify complex ASIC designs.
• Developing and maintaining verification IP and testbenches using SystemVerilog and UVM.
• Collaborating with design and architecture teams to identify and fix bugs.
• Performing functional coverage analysis and driving coverage closure.
• Mentoring and guiding junior verification engineers in best practices and methodologies.

Skills

SystemVerilog

UVM

ASIC verification

Testbench development

Debugging

Tools

VCS

ModelSim

Job description

Synopsys Ireland is seeking an experienced ASIC Digital Verification Engineer to drive verification environments for Interface IP protocols such as DDR, PCIe, CXL and Ethernet. You will develop testbenches using SystemVerilog and UVM, collaborate with design teams, and mentor junior engineers.

Joining our Dublin team, you will contribute to high-quality silicon designs and IP products, ensuring robust verification coverage and driving process improvements across the team.