Senior Verification Architect - AI-Driven Pre-Silicon DV

Intel; Leixlip; On-site; EUR 75,000 - 118,000; Full time

Job summary

Intel in Ireland (Leixlip) seeks a Senior IP Design Verification Engineer to lead verification of ASIC/SOC/IP blocks for NIC, IPU and AI domains. You will design verification plans, build test benches, and drive environments to validate IPs using SystemVerilog, UVM and formal methods, mentoring engineers and adopting AI-assisted flows.

Join Intel's Central Engineering Group delivering high-performance silicon, collaborating with architecture, design and software teams to meet strict performance

Qualifications

• Bachelor's degree in Electrical/Computer Engineering or related field.
• 10+ years of experience in functional design verification of ASIC, SOC or FPGA designs with SystemVerilog, OVM/UVM, and debugging tools.
• Proficiency in creating IP test environments and/or using formal verification methods.
• Strong knowledge of digital design fundamentals and microarchitecture principles.

Responsibilities

• Own verification planning and execution for key IP features across IP and subsystem integration points.
• Build scalable verification environments and targeted test plans with reusable test benches, checkers, VIPs, and behavioral models.
• Collaborate closely with architecture, design, and software teams from specification through bringup; contribute across role boundaries when needed to unblock progress and maintain execution quality.
• Drive ownership of multiple critical blocks and verification components; take full responsibility for functional signoffs and achievement of performance and power metrics.
• Lead IP delivery to multiple customers while ensuring technical excellence; balance competing requirements, schedules, and resources across teams.
• Drive convergence of simulation and formal verification into unified bug hunting and coverage closure strategies; evaluate and adopt emerging methodologies including ML-driven verification flows.
• Mentor and develop verification engineers; establish verification best practices and raise team-level execution quality.
• Comfortable using AI-assisted development tools as part of everyday workflow; track record of delivering reusable, configurable verification collateral

Skills

System Verilog

OVM/UVM

Debugging tools

Digital design fundamentals

Microarchitecture

Formal verification

Networking protocols

AMBA APB/AXI

SystemC / Python / Perl / Shell

AI-assisted verification

Education

Bachelor's degree in Electrical/Computer Engineering or related field

Master's or PhD in Electrical/Computer Engineering or related field

Job description

Intel in Ireland (Leixlip) seeks a Senior IP Design Verification Engineer to lead verification of ASIC/SOC/IP blocks for NIC, IPU and AI domains. You will design verification plans, build test benches, and drive environments to validate IPs using SystemVerilog, UVM and formal methods, mentoring engineers and adopting AI-assisted flows.

Join Intel's Central Engineering Group delivering high-performance silicon, collaborating with architecture, design and software teams to meet strict performance