Cadence in Cork, Ireland seeks a Principal Analog Design Engineer (SERDES) to lead technical efforts on the PMA design team within a SERDES product group located in Cork. The role involves designing high-speed SERDES blocks and guiding analog/mixed-signal circuits from concept through verification. Travel >5% and collaboration with global teams are expected. Cadence emphasizes equal opportunity employment and inclusion.
Qualifications
Minimum 7 years in CMOS SERDES or high-speed I/O IC design.
Degree: BEng, MEng or PhD in a related field.
Solid knowledge of SERDES standards and electrical requirements.
Strong problem-solving, communication and teamwork skills.
Responsibilities
Design of High Speed SERDES products at data rates up to and exceeding 112 Gbps.
Develop analog/mixed signal IC blocks from concept to verification of conformance to specs.
Collaborate with Physical Design Engineers to design IC blocks and PMA sections.
Provide technical leadership in circuit design and SERDES architectures.
Work with global teams across time-zones.
Skills
CMOS SERDES
Jitter analysis
Signal equalization
PLL design
High-speed I/O
Education
BEng/MEng/PhD
Tools
Cadence tools
Job description
Cadence in Cork, Ireland seeks a Principal Analog Design Engineer (SERDES) to lead technical efforts on the PMA design team within a SERDES product group located in Cork. The role involves designing high-speed SERDES blocks and guiding analog/mixed-signal circuits from concept through verification. Travel >5% and collaboration with global teams are expected. Cadence emphasizes equal opportunity employment and inclusion.