High-Speed Analog/Mixed-Signal SerDes Engineer

QUALCOMM, Inc.

Cork

Hybrid

EUR 90,000 - 140,000

Full time

4 days ago
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Job summary

QT Technologies Ireland Limited in Cork, Ireland, is seeking an Analog / Mixed-Signal SerDes Design Engineer to develop and deliver high-speed SerDes IP for Qualcomm SoCs. The role focuses on low-power, low-voltage designs in advanced FinFET/GAA nodes, requiring close collaboration with layout teams to ensure optimal analog performance.

The candidate will architecture and implement blocks such as serializers/deserializers, PLLs, and VCOs, while performing simulations, verification, and silicon

Qualifications

  • Bachelor's degree in Science, Engineering, or related field.
  • 2+ years ASIC design, verification, validation, integration, or related work experience.
  • Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience.
  • PhD in Science, Engineering, or related field.

Responsibilities

  • Architecture, design, and development of analog / mixed signal hard macros for the SerDes IP Design team.
  • Create design specifications.
  • Create behavioural models in Verilog.
  • Set-up, run and analyse circuit simulations.
  • Deliver hard macros and support customer integration and testing.
  • Perform silicon characterization analysis and prepare silicon verification reports.

Skills

Analog mixed-signal design
High-speed SerDes
Scripting
Communication skills

Education

Master's or PhD in Science/Engineering
Bachelor's in Science/Engineering

Tools

SPICE simulators
Schematic capture tools
Analog layout tools

Job description

QT Technologies Ireland Limited in Cork, Ireland, is seeking an Analog / Mixed-Signal SerDes Design Engineer to develop and deliver high-speed SerDes IP for Qualcomm SoCs. The role focuses on low-power, low-voltage designs in advanced FinFET/GAA nodes, requiring close collaboration with layout teams to ensure optimal analog performance.

The candidate will architecture and implement blocks such as serializers/deserializers, PLLs, and VCOs, while performing simulations, verification, and silicon

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