End-to-End Digital ASIC Engineer (RTL & Scripting)

European Tech Recruit; Cork; On-site; EUR 65,000 - 90,000; Full time

Job summary

Unknown Semiconductor Company in Ireland is seeking a Digital ASIC Engineer to join the design team to develop digital blocks used in consumer electronics, wearables and connected devices. You will write specs, code RTL in SystemVerilog, verify with testbenches, perform synthesis and timing closure, and help shape low-power design choices while collaborating with architects and other HW/SW engineers.

You will also script in Python to speed up team processes and communicate effectively in a

Qualifications

• Proven RTL design experience in a professional setting.
• Strong SystemVerilog coding and verification skills.
• Experience with Python or Tcl/Perl scripting for automation.
• Clear communicator and team player.

Responsibilities

• Design and code digital logic blocks for chip integration.
• Verify against test benches and fix defects.
• Handle synthesis and timing closure using signoff tools.
• Collaborate with systems architects and HW/SW engineers.
• Support power budgeting and low-power design decisions.

Skills

RTL Design

SystemVerilog

Python scripting

C++/SystemC

Tools

Synthesis tools (Cadence/Synopsys)

PrimeTime/PTPX

LEC

Signoff tools

Job description

Unknown Semiconductor Company in Ireland is seeking a Digital ASIC Engineer to join the design team to develop digital blocks used in consumer electronics, wearables and connected devices. You will write specs, code RTL in SystemVerilog, verify with testbenches, perform synthesis and timing closure, and help shape low-power design choices while collaborating with architects and other HW/SW engineers.

You will also script in Python to speed up team processes and communicate effectively in a