Digital Design Engineer

Steneg; Cork; On-site; EUR 70,000 - 90,000; Full time

Job summary

A leading technology company in Ireland seeks an experienced digital ASIC designer to contribute to various aspects of digital design and development. This role involves working with cross-functional teams to deliver high-quality silicon and support integration efforts. The ideal candidate should have over five years of experience in digital ASIC design, strong RTL development skills using Verilog or SystemVerilog, and an understanding of timing analysis. Join us in delivering innovative hardware solutions that drive industry success.

Qualifications

• Minimum 5 years of experience in digital ASIC design.
• Strong experience in RTL development.
• Good understanding of synthesis and timing analysis.

Responsibilities

• Contribute to the design and implementation of digital ASIC modules.
• Support subsystem integration.
• Participate in design reviews and technical discussions.

Skills

RTL development using Verilog or SystemVerilog

Digital design flows

Debugging skills

Collaboration skills in multidisciplinary teams

Tools

Industry-standard EDA tools

Job description

Our client is a well-established international technology company operating within the semiconductor and advanced electronics sector. The organization focuses on the design, development, and delivery of innovative hardware and mixed‑signal solutions that support a wide range of industrial and commercial applications.

Mission

The mission of this position is to contribute to the development of advanced digital ASIC components, ensuring robust architecture, efficient implementation, and alignment with system‑level objectives.

The role plays a key part in delivering high‑quality silicon by driving digital design activities, supporting integration efforts, and contributing to performance and power optimization initiatives across the development cycle.

Responsibilities

Digital Design & Development

• Contribute to the design and implementation of digital ASIC modules.
• Translate functional requirements into structured RTL implementations.
• Participate in architectural discussions and design trade‑off analysis.
• Ensure alignment with performance, timing, and power targets.
• Support verification planning and functional validation activities.
• Perform design checks and contribute to resolving functional and timing issues.
• Collaborate with verification teams to ensure design robustness.

Integration & Implementation Support

• Work closely with cross‑functional teams to support subsystem integration.
• Contribute to synthesis and timing‑related activities.
• Assist in addressing implementation challenges during backend phases.
• Participate in design reviews and technical discussions.
• Contribute to documentation and internal engineering standards.
• Support knowledge sharing and team development initiatives.

Required Qualifications

• Minimum 5 years of experience in digital ASIC design.
• Strong experience in RTL development using Verilog or SystemVerilog.
• Good understanding of digital design flows, including synthesis and timing analysis.
• Familiarity with common on‑chip interfaces and integration concepts.
• Experience using industry‑standard EDA tools.
• Solid debugging and problem‑solving skills in complex digital environments.
• Ability to collaborate effectively within multidisciplinary engineering teams.

Preferred Experience

• Exposure to high‑speed digital subsystems or complex SoC environments.
• Familiarity with low‑power design considerations.
• Experience supporting integration or implementation phases of ASIC development.
• Previous involvement in mentoring or technical review activities.