ASIC Verification Engineer (Microcontrollers / Sensors) - Visas Supported

European Tech Recruit; Cork; On-site; EUR 70,000 - 110,000; Full time

Job summary

European Tech Recruit in Cork, Ireland is seeking an experienced ASIC Design Verification Engineer to join a leading semiconductor team focused on sensors. The role involves verification of sensor RTL, testbench development, and integration of C models within UVM frameworks.

You will work within a dynamic group addressing tapeout quality, coverage analysis, and regression framework improvements in a technology-driven environment.

Responsibilities

• Deploying Industry-Leading Verification Methodologies such as UVM and Formal Verification
• Developing Testbenches and Verification Components such as UVCs, C models, and Vertical/Horizontal re-usable Verification Environments.
• Verifying sensor algorithms RTL for ASIC tapeout quality delivery
• Test plan development based on Design documents and interaction with design/systems engineers
• Implementing C model integration within UVM framework.
• Debugging, verifying, optimizing, and bit-exact matching with test vectors
• Analyzing coverage data and working with Design teams to address coverage holes
• Develop/augment framework for running regressions

Job description

ASIC Design Verification Engineer - (Sensors)

An exciting career opportunity for an experienced ASIC Verification Engineer to join Global Leading Semiconductor Company, working alongside their exceptional team in Cork, Ireland.

The position is technology focused and involves participation in a broad range of sensors systems engineering activities within the Sensors Technologies group.

Responsibilities will include:

• Deploying Industry-Leading Verification Methodologies such as UVM and Formal Verification
• Developing Testbenches and Verification Components such as UVCs, C models, and Vertical/Horizontal re-usable Verification Environments.
• Verifying sensor algorithms RTL for ASIC tapeout quality delivery
• Test plan development based on Design documents and interaction with design/systems engineers
• Implementing C model integration within UVM framework.
• Debugging, verifying, optimizing, and bit-exact matching with test vectors
• Analyzing coverage data and working with Design teams to address coverage holes
• Develop/augment framework for running regressions