RISC-V Microcontroller Design Verification Engineer

European Tech Recruit; Cork; On-site; EUR 60,000 - 90,000; Full time

Job summary

European Tech Recruit are partnering with a Cork-based semiconductor leader to recruit a RISC-V Microcontroller Design Verification Engineer. You will join the Microcontroller Sub-System IP team delivering embedded processing solutions across IoT, Mobile, Auto, XR, Compute, and more.

The role emphasizes UVM-based verification, testbench development, coverage analysis, and collaboration with design, SoC and validation teams to integrate designs into higher-level subsystems.

Qualifications

• 3+ years of ASIC verification experience with UVM-based workflows.
• Experience in ARM or RISC-V ISA verification and debug.
• Familiarity with formal verification tools and SystemVerilog assertions.
• Knowledge of power-aware verification and RTL simulation practices.

Responsibilities

• Apply UVM and formal verification methodologies to block-level design.
• Develop testbenches and verification components (UVCs, C models).
• Perform coverage analysis and close gaps with design teams.
• Collaborate with design, SoC and validation teams across levels.
• Assist integration of designs into higher-level subsystems and test planning.

Skills

UVM

SystemVerilog

Constrained-random

Coverage-driven

Perl/Python

C/C++

RTL simulation

Power-aware

AMBA

Formal verification

Education

Bachelor's degree

Master's degree

Tools

Jasper

VC_Formal

Job description

European Tech Recruit are working closely with a leading semicon company, based in Cork, who are looking for a talented RISC-V Microcontroller Design Verification Engineer to join their team.

In this role you will join the Microcontroller Sub-System IP team who play a crucial role in enabling embedded processing solutions across various functions and products. This team deals with security, power management, and other system-on-chip functions across multiple business units (IoT, Mobile, Auto, XR, Compute, etc.).

Responsibilities as RISC-V Microcontroller Design Verification Engineer:

• Verification Methodologies: Deploy industry-leading verification methodologies such as Universal Verification Methodology (UVM) and Formal Verification.
• Testbench and Verification Component Development: Create testbenches and verification components, including Universal Verification Components (UVCs), C models, and reusable vertical/horizontal verification environments.
• Coverage Analysis: Ensure comprehensive coverage and collaborate with design teams to address any coverage gaps.
• Cross-Functional Collaboration: Work closely with design, SoC, and validation teams to solve problems at various levels.
• System Solutions Support: Assist in integrating design into higher-level subsystems, including test planning, test vector delivery, and test vector debugging.

Requirements:

• Bachelor’s or Master’s degree in Science, Engineering, or a related field.
• 3+ years of ASIC design verification experience, preferably with UVM-based.
• Familiarity with ARM or RISC-V ISA verification.
• Experience using formal verification tools like Jasper or VC_Formal is a plus.
• Understanding of processor/microcontroller sub-systems is advantageous.
• Familiarity with AMBA bus protocols is desirable.
• Experience with gate-level simulation debug and power extraction tools is beneficial.
• Knowledge of power-aware verification methodologies.
• Proficiency in constrained-random verification environments and coverage-driven methodologies.
• Familiarity with System Verilog assertions.
• Ability to debug test failures and report verification results to achieve expected code/functional/line coverage goals.
• Extensive usage of RTL simulation tools.
• Skills in UVM, System Verilog, and Perl/Python shell scripting.
• Basic familiarity with C/C++.