Senior Verification Lead – Open‑Source Silicon & RISC‑V

microTECH Global LTD; Cambridge; On-site; GBP 70,000 - 100,000; Full time

Benefits offered by this job

25 days annual leave

Employer pension contribution

Private medical insurance

Job summary

microTECH Global LTD in Cambridge, UK, is seeking a Senior / Lead Verification Engineer to shape verification methodology and technical direction on production-grade open-source silicon, including Ibex and OpenTitan platforms. You will join a growing DV team and drive test strategy across complex designs.

The role emphasizes SystemVerilog/UVM proficiency, full verification lifecycle experience, and collaboration across multi-organisation teams.

Qualifications

• 5+ years industry experience in design verification.
• Strong SystemVerilog and UVM expertise.
• Experience across the full verification cycle (planning to tape-out).
• Able to provide estimates and coordinate with project managers.
• Comfortable in multidisciplinary, multi-organisation teams.
• Familiar with Git and code review tools (GitHub, GitLab, Gerrit).
• Programming in C and/or Python for tests and automation.
• Undergraduate degree in a technical discipline or equivalent.

Responsibilities

• Design, implement, and debug block/system-level tests and testbenches using SystemVerilog and UVM.
• Develop test and coverage plans for new and updated designs.
• Triage and debug nightly regressions.
• Review contributions to open-source projects.
• Enhance test and CI infrastructure.
• Collaborate on academic/industry publications.
• Stay current with verification best practices and introduce improvements.

Skills

Test planning

Automation testing

5+ years verification

Full verification cycle

C

Python

Education

Undergraduate degree in a technical discipline

Tools

SystemVerilog

UVM

Git

Job description

microTECH Global LTD in Cambridge, UK, is seeking a Senior / Lead Verification Engineer to shape verification methodology and technical direction on production-grade open-source silicon, including Ibex and OpenTitan platforms. You will join a growing DV team and drive test strategy across complex designs.

The role emphasizes SystemVerilog/UVM proficiency, full verification lifecycle experience, and collaboration across multi-organisation teams.