Senior Design Verification Engineer - CPU / SoC

European Tech Recruit; Cambridge; On-site; GBP 90,000 - 130,000; Full time

Job summary

European Tech Recruit is partnered with a leading UK semiconductor company to hire an experienced Design Verification Engineer for an on-site role in Cambridge. You will work with Architects to prove CPU and SoC correctness before release to millions of users.

The role requires developing test/coverage plans, building scalable verification environments, and driving regressions and debugging to ensure robust silicon bring-up. This is a permanent, onsite position.

Qualifications

• Experience validating CPU/SoC micro-architectures.
• Proficiency with SystemVerilog/UVM environments.
• Strong knowledge of verification methodologies and coverage.
• Hands-on with formal verification concepts and tools.

Responsibilities

• Validate high-level system requirements with SOC Architects.
• Develop test and coverage plans for CPU domains.
• Build scalable verification environments with stimuli, checkers, assertions, and trackers.
• Run rigorous regressions and debugging to achieve robust silicon bring-up.
• Report progress using functional coverage and bug density metrics.

Skills

CPU verification

SOC architectures

SystemVerilog

UVM

Formal verification

RIS

Tools

Simulators

Waveform viewers

Formal Proof Tools

Job description

We are currently partnered with an industry leading semiconductor giant in the UK looking to expand their team with an experienced Design Verification Engineer to join a high caliber team of engineers working on high-performance CPUs and SoC validation. In this role, you will work closely with Architects to prove the correctness of complex micro-architectures before they reach the hands of millions of global users.

This is a permanent position based in Cambridge - please note this is a full onsite role.

Key responsibilities for this Senior Design Verification Engineer position:

• Work with SOC Architects to validate high-level system requirements and micro-architectural concepts.
• Develop detailed Test and Coverage plans for specific functional domains within the CPU.
• Build scalable and portable verification environments, including Stimulus, Checkers, Assertions, and Trackers.
• Enable all features under your care through rigorous regressions and deep-dive debugging of test failures.
• Report progress using advanced metrics, including functional coverage and bug density.

Key requirements:

• Extensive experience working with CPU technologies with proven skills in domains such as Cache Coherence, Memory Ordering, Branch Prediction, Renaming, and Speculative Execution.
• Experience with Random Instruction Sequencing (RIS) at the Block and Subsystem levels.
• In-depth experience with Simulators, Waveform viewers, and Formal Proof Tools.
• Familiarity with Formal Verification, Assertions, and Silicon bring-up.

Keywords:

CPU Verification / Design Verification / DV / SystemVerilog / UVM / Cache Coherence / Branch Prediction / Formal Verification / RIS / SOC / Assembly / Cambridge / Silicon Bring-up

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