Senior Subsystem Design Engineer (RTL/IP)

Camwebdir; United Kingdom; Hybrid; GBP 110,000 - 160,000; Full time

Job summary

Arm is seeking a Staff Subsystem Design Engineer to lead RTL design and integration of complex IPs and compute subsystems. You will specify, architect, and implement subsystems while collaborating with architecture, verification, and implementation teams to achieve robust designs.

We value deep expertise in SystemVerilog, AMBA protocols, and power/clock strategies, with a track record of delivering high-quality IP in a challenging environment. Hybrid working arrangements apply within the UK.

Qualifications

• Bachelor's/Master's/PhD in Electrical Engineering, Electronics Engineering, Computer Engineering or related field.
• 10+ years of relevant industry experience in RTL design and subsystem/IP development.
• Strong knowledge of SystemVerilog/Verilog and RTL design methodologies.
• Experience with integration of Arm and third-party IP into subsystems.

Responsibilities

• Specify, microarchitecture, RTL design and integrate complex IPs and compute subsystems.
• Develop subsystem and IP microarchitecture specifications from high-level requirements.
• Collaborate with verification, implementation and performance teams to ensure designs meet requirements.
• Lead design reviews and provide guidance to other engineers.
• Drive design quality checks (Lint, CDC, RDC, X-propagation) and timing closure.

Skills

SystemVerilog

RTL design

Subsystem IP design

Microarchitecture

Design verification

Power/Timing/Area trade-offs

AMBA AXI/APB

C/C++ knowledge

Education

Bachelor's/Master's/PhD in Electrical/Electronics/Computer Engineering

Tools

EDA tools

Job description

Arm is seeking a Staff Subsystem Design Engineer to lead RTL design and integration of complex IPs and compute subsystems. You will specify, architect, and implement subsystems while collaborating with architecture, verification, and implementation teams to achieve robust designs.

We value deep expertise in SystemVerilog, AMBA protocols, and power/clock strategies, with a track record of delivering high-quality IP in a challenging environment. Hybrid working arrangements apply within the UK.