Senior Subsystem & SoC Design Engineer - RTL & IP

Semiconductor Engineering; Cambridge; On-site; GBP 60,000 - 90,000; Full time

Job summary

Semiconductor Engineering in Cambridge seeks a design-oriented engineer to contribute to specification, design and verification of subsystems and testchips. You will develop RTL and design intent artefacts, integrate IPs and run design checks.

You will collaborate with verification to review test plans, assist debugging and with implementation to optimise designs, while planning work, tracking progress and reporting status to ensure timely delivery.

Job description

Semiconductor Engineering in Cambridge seeks a design-oriented engineer to contribute to specification, design and verification of subsystems and testchips. You will develop RTL and design intent artefacts, integrate IPs and run design checks.

You will collaborate with verification to review test plans, assist debugging and with implementation to optimise designs, while planning work, tracking progress and reporting status to ensure timely delivery.