Senior SoC DV Engineer - UVM/C Test Specialist

W3Global; Cambridge; Presencial; GBP 70.000 - 90.000; Jornada completa

Descripción de la vacante

W3Global is seeking an experienced SoC Design Verification Engineer to join their Cambridge/Bristol team on a 6-month contract. The role focuses on functional verification of next-generation multi-die SoCs using SystemVerilog/UVM, with processor-driven verification in C on embedded cores.

Strong debugging, analytical skills and ARM-based SoC understanding are required. You will work on subsystem- and SoC-level verification, reuse/extend existing testbenches, and drive coverage closure and

Formación

• Experience in digital design verification using SystemVerilog and UVM.
• Ability to modify and extend existing UVM testbenches.
• Understanding of constrained-random verification and functional coverage.
• Experience in subsystem-level or SoC-level verification.
• Strong RTL debugging and problem solving.

Responsabilidades

• Perform subsystem and SoC functional verification.
• Reuse and enhance SystemVerilog/UVM testbenches.
• Develop and verify processor-based C tests for SoC verification.
• Run regressions, debug failures, and close coverage gaps.
• Coordinate verification plans with design and validation teams.

Conocimientos

SystemVerilog

UVM

SoC Verification

C

Debugging

Functional Coverage

Gate level simulation

Python / scripting

Regression management

Educación

Bachelor's or Master's in Electronics / Electrical / Computer Engineering / VLSI

Descripción del empleo

W3Global is seeking an experienced SoC Design Verification Engineer to join their Cambridge/Bristol team on a 6-month contract. The role focuses on functional verification of next-generation multi-die SoCs using SystemVerilog/UVM, with processor-driven verification in C on embedded cores.

Strong debugging, analytical skills and ARM-based SoC understanding are required. You will work on subsystem- and SoC-level verification, reuse/extend existing testbenches, and drive coverage closure and