Senior Signal Integrity Engineer: High-Speed SerDes & PCIe

Drivenets; Greater London; Vor Ort; GBP 90.000 - 130.000; Vollzeit

Zusammenfassung

DriveNets is seeking a Senior Signal Integrity Engineer to join our Hardware Engineering team in the UK. You will perform SI analyses for high‑speed interfaces (Ethernet, PCIe, DDR5), develop SI guidelines, and ensure electrical compliance for SERDES I/Os in cutting‑edge PCBs.

Collaborating with PCB layout, you will run time‑domain and frequency‑domain simulations, address reflections, crosstalk, and PDN issues, and build behavioral models from measured data to guide future designs.

Qualifikationen

• Bachelor's or Master’s degree in Electrical/Electronics Engineering with 10+ years of relevant experience.
• Strong understanding of electromagnetic concepts and transmission line theory.
• Extensive experience in signal integrity analysis for high-speed serial interfaces (Ethernet, PCIe, DDR5).
• Proficiency in using EDA tools like Ansys SIWAVE, HFSS.
• Hands-on experience with time-domain and frequency-domain analysis, jitter, and eye-diagram analysis.
• Background in HSPICE simulations and model development.

Aufgaben

• Conduct signal integrity analysis and simulations for high-speed interfaces such as 112Gbps Ethernet, PCIe Gen5, and DDR5 interfaces.
• Develop and implement signal integrity guidelines for PCB design, ensuring high-performance and low-loss signal paths.
• Analyze and resolve signal integrity issues related to high-speed interfaces, including reflection, crosstalk, and PDN issues.
• Collaborate with PCB layout engineers to optimize design for signal integrity, ensuring compliance with electrical standards and high-speed design best practices.
• Perform time-domain and frequency-domain analysis, including loss, jitter, and eye-diagram analysis.
• Utilize EDA tools such as Ansys SIWAVE, HFSS, or similar for simulation and validation of signal integrity designs.
• Work closely with cross-functional teams to integrate signal integrity considerations into the overall hardware design process.
• Develop behavioural models based on measured signal integrity data to inform future design and simulation work.
• Conduct pre- and post-layout simulations and measurements for high-speed signal interfaces.

Kenntnisse

Signal integrity

EM concepts

Team collaboration

Communication skills

Ausbildung

Bachelor's or Master's in Electrical/Electronics Engineering

Tools

Ansys SIWAVE

HFSS

HSPICE

Jobbeschreibung

DriveNets is seeking a Senior Signal Integrity Engineer to join our Hardware Engineering team in the UK. You will perform SI analyses for high‑speed interfaces (Ethernet, PCIe, DDR5), develop SI guidelines, and ensure electrical compliance for SERDES I/Os in cutting‑edge PCBs.

Collaborating with PCB layout, you will run time‑domain and frequency‑domain simulations, address reflections, crosstalk, and PDN issues, and build behavioral models from measured data to guide future designs.