Hardware Validation Engineer: SerDes, PCIe & Ethernet

EngineersOfAI; Bristol; On-site; GBP 60,000 - 85,000; Full time

Benefits offered by this job

Flexible working

Generous leave

Pension match

Phantom equity

On-site barista

Income protection

Private medical insurance

Dental cover

Cycle to work scheme

Job summary

Graphcore is seeking a Validation and Debug Engineer to verify high-speed interfaces and ensure real-world performance across our silicon and platforms. You will own hands-on validation in the lab, focusing on SerDes, PCIe Root Complex and Ethernet, and you will help translate lab findings into engineering decisions.

You will collaborate with Architecture, Silicon Engineering, Hardware Engineering and Firmware, driving bring-up and issue resolution through data-driven decisions.

Qualifications

• Hands-on hardware validation experience with board bring-up and subsystem debugging.
• Experience validating and debugging Ethernet, PCIe Root Complex and SerDes systems.
• Proficient with lab instruments such as oscilloscopes, BERT systems, VNA/TDR equipment and PCIe protocol analysers.
• Ability to debug signal integrity, protocol-level and interface issues through to root cause.
• Experience with PCIe bring-up, LTSSM analysis, link training, equalization tuning and interoperability testing.
• Ability to work independently and drive issue resolution across teams.

Responsibilities

• Own hands-on validation and debug in the lab, focused on SerDes, PCIe Root Complex and Ethernet.
• Tune links, investigate failures and turn lab findings into clear engineering decisions.
• Drive bring-up, debug issues and help teams reach data-based decisions.
• Speak up when something is unclear or risky and collaborate across Architecture, Silicon and Firmware teams.

Skills

Hardware validation

Ethernet/PCIe/SerDes

Lab instrumentation

Signal integrity debugging

PCIe bring-up

Independent work

Tools

PCIe protocol analysers

Job description

Graphcore is seeking a Validation and Debug Engineer to verify high-speed interfaces and ensure real-world performance across our silicon and platforms. You will own hands-on validation in the lab, focusing on SerDes, PCIe Root Complex and Ethernet, and you will help translate lab findings into engineering decisions.

You will collaborate with Architecture, Silicon Engineering, Hardware Engineering and Firmware, driving bring-up and issue resolution through data-driven decisions.