Senior Power Integrity Engineer for High-Speed Networking

Drivenets; Greater London; On-site; GBP 70,000 - 110,000; Full time

Job summary

DriveNets is seeking a highly motivated Power Integrity Engineer to join our Hardware Engineering team in driving PI diagnostics for next-generation networking platforms. You will define and validate power delivery networks for high-performance ASICs, SerDes interfaces, optical modules, and AI-scale networking systems.

You will collaborate with ASIC, FPGA, and mechanical teams to ensure robust PI, perform pre- and post-layout simulations, and lead lab validation efforts to ensure reliable

Qualifications

• B.Sc. or M.Sc. in Electrical Engineering.
• 5+ years of experience in Power Integrity, Hardware Design, or related disciplines.
• Strong understanding of power delivery networks, decoupling methodologies, and target impedance concepts.
• Hands-on PI simulation tools: Cadence Sigrity PowerSI / OptimizePI, Ansys SIwave, Ansys HFSS, PowerDC.
• Experience designing high-layer-count PCBs for networking, telecom, server, or data-center products.
• Knowledge of high-speed digital systems and interaction between SI and PI.
• Experience with multi-phase voltage regulators, power sequencing, and power management architectures.
• Strong understanding of PCB materials, stackups, and manufacturing constraints.
• Experience performing lab validation and correlation measurements.
• Excellent problem-solving, communication, and teamwork skills.

Responsibilities

• Lead PI activities throughout the hardware development lifecycle from architecture through production.
• Define and optimize PDNs for high-current networking ASICs and supporting devices.
• Perform pre-layout and post-layout PI simulations using industry-standard tools.
• Establish target impedance requirements and validate across all power rails.
• Analyze DC voltage drop, AC impedance, transient response, and power distribution performance.
• Collaborate with PCB layout engineers to optimize stackups, planes, decoupling, and power routing.
• Work with SI engineers to co-optimize high-speed interfaces.
• Develop PI design guidelines and best practices for future products.
• Support schematic/layout reviews and design sign-off activities.
• Perform laboratory measurements and correlation using oscilloscopes, VNAs, power analyzers, and current probes.
• Investigate and resolve PI-related issues during bring-up, validation, and production.
• Collaborate with ASIC/FPGA/memory/optics/power vendors to optimize performance.
• Drive continuous improvement of PI methodologies and validation processes.

Skills

Power Integrity

Hardware Design

PI Simulation

Cadence Sigrity PowerSI

Ansys SIwave

Ansys HFSS

PowerDC

High-layer-count PCBs

High-speed digital

Lab validation

Education

Electrical Engineering degree

Tools

Cadence Sigrity PowerSI

OptimizePI

Ansys SIwave

Ansys HFSS

PowerDC

Job description

DriveNets is seeking a highly motivated Power Integrity Engineer to join our Hardware Engineering team in driving PI diagnostics for next-generation networking platforms. You will define and validate power delivery networks for high-performance ASICs, SerDes interfaces, optical modules, and AI-scale networking systems.

You will collaborate with ASIC, FPGA, and mechanical teams to ensure robust PI, perform pre- and post-layout simulations, and lead lab validation efforts to ensure reliable