Senior IP Verification Architect - SystemVerilog/UVM

Infineon Technologies; Bristol; On-site; GBP 60,000 - 80,000; Full time

Job summary

Infineon Technologies is seeking a Senior Staff Verification Engineer in Bristol to lead the development of IP verification environments. You will leverage your 8+ years of experience in Verification Engineering and expertise in System Verilog - UVM to enhance IP test bench architecture. Responsibilities include creating functional coverage models, debugging failing test cases, and collaborating with design teams. The role calls for a Bachelor's degree in Electrical/Electronic Engineering and fluency in English.

Qualifications

• 8+ years of experience in Verification Engineering.
• Strong understanding of verification concepts and System Verilog fundamentals.
• Eagerness to learn industry-standard verification methodologies like UVM.

Responsibilities

• Drive development and optimization of IP verification environments.
• Take ownership of complex IP verification with System Verilog - UVM.
• Ensure test benches meet sign-off targets and functional safety requirements.

Skills

System Verilog - UVM

Debugging workflows

Problem-solving

Teamwork

Time management

Education

Bachelor’s degree in Electrical/Electronic Engineering or related field

Job description

Infineon Technologies is seeking a Senior Staff Verification Engineer in Bristol to lead the development of IP verification environments. You will leverage your 8+ years of experience in Verification Engineering and expertise in System Verilog - UVM to enhance IP test bench architecture. Responsibilities include creating functional coverage models, debugging failing test cases, and collaborating with design teams. The role calls for a Bachelor's degree in Electrical/Electronic Engineering and fluency in English.