Verification Engineer Trainee: Build Real IPs & Subsystems

Infineon Technologies; Bristol; On-site; GBP 30,000 - 40,000; Full time

Job summary

Infineon Technologies in Bristol is looking for a talented candidate to join their team focused on developing IPs for the AURIX™ family. This role involves collaboration with architecture and design teams and requires strong verification knowledge using SystemVerilog.

The ideal candidate will have a degree in Engineering, Science, or related fields, familiarity with electronic design automation tools, and fluency in English. Infineon offers a supportive and inclusive work environment with opportunities for growth.

Qualifications

• Degree in Engineering, Science, Technology, or Maths is needed.
• Some experience in SystemVerilog, Specman-e, or SystemC is a plus.
• Basic understanding of scripting in Python is required.
• Proficiency in EDA tools would be an advantage.
• Strong interpersonal and analytical skills are essential.

Responsibilities

• Understand the process of developing IPs for the AURIX™ family.
• Collaborate with teams to solve challenges for high-quality subsystems.
• Create verification environments and debug test failures using SystemVerilog UVM.
• Explore machine learning to improve workflows.
• Work within quality and functional safety process frameworks.

Skills

Engineering degree

Some experience in SystemVerilog

Basic scripting in Python

Proficiency in EDA tools

Time management skills

Fluent in English

Job description

Infineon Technologies in Bristol is looking for a talented candidate to join their team focused on developing IPs for the AURIX™ family. This role involves collaboration with architecture and design teams and requires strong verification knowledge using SystemVerilog.

The ideal candidate will have a degree in Engineering, Science, or related fields, familiarity with electronic design automation tools, and fluency in English. Infineon offers a supportive and inclusive work environment with opportunities for growth.