Senior High‑Speed IC Validation Engineer

Tundra Technical Solutions

Farnborough

On-site

GBP 80,000 - 110,000

Full time

14 days+

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Job summary

Tundra Technical Solutions is seeking a Senior Chip Validation Engineer to join the chip validation team. You will validate high-speed SerDes PHYs, perform hands-on testing with lab equipment, and develop validation plans with design and test teams.

The role requires 8+ years in chip/ASIC validation, strong SerDes knowledge, and proficiency in Python for test automation; RF/analogue testing experience is a plus.

Qualifications

  • 8+ years' experience in chip, ASIC, or silicon validation.
  • Strong knowledge of high-speed SerDes PHYs and communication interfaces.
  • Hands-on experience with RF, analogue, and high-speed testing.
  • Proficiency with Python for test automation (C/C++ advantageous).
  • Experience working with laboratory test equipment such as BERTs, Oscilloscopes, VNAs, or DCAs.
  • Degree in Electronic Engineering, Computer Engineering, or a related discipline.

Responsibilities

  • Validate high-speed SerDes PHYs, including link bring-up, equalisation tuning, and PVT verification.
  • Perform hands-on laboratory testing using equipment such as Oscilloscopes, BERTs, DCAs, VNAs, Spectrum Analysers, and PNAX.
  • Conduct eye diagram analysis, jitter tolerance, stressed eye testing, and PHY parameter optimisation.
  • Develop comprehensive chip and system validation plans alongside design and test engineering teams.
  • Create and maintain automated test frameworks using Python (C/C++ experience also beneficial).
  • Investigate and debug hardware issues, perform root cause analysis, and contribute to continuous product quality improvements.

Skills

SerDes PHYs
Test automation
C/C++
Python scripting
RF testing
Lab equipment handling

Education

Electronic Engineering degree

Tools

Oscilloscopes
BERTs
VNAs
DCAs

Job description

Tundra Technical Solutions is seeking a Senior Chip Validation Engineer to join the chip validation team. You will validate high-speed SerDes PHYs, perform hands-on testing with lab equipment, and develop validation plans with design and test teams.

The role requires 8+ years in chip/ASIC validation, strong SerDes knowledge, and proficiency in Python for test automation; RF/analogue testing experience is a plus.

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