Senior Formal Verification Engineer - FPV & SystemVerilog

MaC VC; Cambridge; In loco; GBP 70.000 - 110.000; Tempo pieno

Descrizione del lavoro

Qualcomm Technologies International Ltd is seeking a verification engineer specializing in Formal Verification for ASIC design. The role involves developing FPV test plans, writing SystemVerilog Assertions, and collaborating with RTL design and DV teams to deliver signed-off results.

The candidate should have 2+ years in ASIC verification, a strong formal-methods background, and excellent communication skills to contribute across global teams.

Competenze

• Bachelor's degree and 2+ years in ASIC design/verification.
• Master's degree with 1+ year in ASIC design/verification.
• PhD in Science/Engineering accepted with relevant experience.
• Experience with Formal Verification, FPV and related tools is required.

Mansioni

• Develop FPV test plans and assertion-based testbenches.
• Collaborate with RTL design and DV teams to meet project goals.
• Write SystemVerilog Assertions and debug RTL artefacts.
• Achieve formal sign-off matrices and coverage closure.

Conoscenze

Formal Verification

SystemVerilog Assertions

Proof techniques

Bug-hunting

Communication

Formazione

Bachelor's degree in Science/Engineering

Master's degree in Science/Engineering

PhD in Science/Engineering

Electronics/Computer Engineering

Strumenti

JasperGold

VC Formal

DPV

C2RTL

Descrizione del lavoro

Qualcomm Technologies International Ltd is seeking a verification engineer specializing in Formal Verification for ASIC design. The role involves developing FPV test plans, writing SystemVerilog Assertions, and collaborating with RTL design and DV teams to deliver signed-off results.

The candidate should have 2+ years in ASIC verification, a strong formal-methods background, and excellent communication skills to contribute across global teams.