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Qualcomm Technologies International Ltd in Cambridge seeks an ASIC verification engineer focused on Formal Property Verification (FPV) to design and implement assertion-based testbenches and drive formal sign-off. You will work with global RTL design and DV teams to achieve project goals and apply industry-standard formal tools including SVA and JasperGold.
Qualifications include a Bachelor's in science/engineering with 2+ years in ASIC design/verification, or a Master's with 1+ year, or a PhD.
Qualcomm Technologies International Ltd
Engineering Group, Engineering Group > ASICS Engineering
Bachelors/Masters in Electronics/Computer Engineering
2+ years of relevant experience in Formal Verification
Formal Property Verification (FPV), DPV, C2RTL, SystemVerilog, SystemVerilog Assertions (SVA), JasperGold, VC Formal
*References to a particular number of years experience are for indicative purposes only. Applications from candidates with equivalent experience will be considered, provided that the candidate can demonstrate an ability to fulfill the principal duties of the role and possesses the required competencies.
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