Senior Digital Design Engineer - High-Speed SerDes & Memory

Kandou AI; Reading; On-site; GBP 82,000 - 118,000; Full time

Job summary

Kandou seeks a Digital Design Engineer to drive high-speed digital circuit development for a chiplet-based AI memory fabric. You will define interfaces, perform RTL design, timing analysis, and rigorously verify blocks with close interaction across verification and analog teams.

Responsibilities include post-silicon lab bring-up, IP integration, and collaboration with customers to meet performance, area, and power targets in deep-submicron CMOS tech.

Qualifications

• Experience in digital circuit design for multi-Gigabit links.
• Experience with high-speed CMOS technologies and timing analysis.
• Familiarity with verification of data processing systems.

Responsibilities

• Define concepts and analog-to-digital interfaces.
• RTL design and IP verification basics.
• Perform logic synthesis and timing analysis.
• Collaborate with verification and analog/mixed-signal designers.
• Develop block-level specs for high-speed digital circuits meeting system targets.
• Support the lab bring-up and productization of chips.
• Understand high-speed serial protocols (USB4, PCIe).
• Coordinate with customers on requirements and performance results.

Skills

Digital circuit design

High-speed interfaces

RTL coding

Scripting Python

Verification methods

System-level requirements

Team collaboration

Education

Masters/PhD in E.E. or related

MSc in electronics/electrical engineering

Tools

Cadence toolset

Job description

Kandou seeks a Digital Design Engineer to drive high-speed digital circuit development for a chiplet-based AI memory fabric. You will define interfaces, perform RTL design, timing analysis, and rigorously verify blocks with close interaction across verification and analog teams.

Responsibilities include post-silicon lab bring-up, IP integration, and collaboration with customers to meet performance, area, and power targets in deep-submicron CMOS tech.