Senior DFT Architect for AI Accelerator SoC

NIF; Greater London; On-site; GBP 90,000 - 130,000; Full time

Benefits offered by this job

Competitive salary

Equity

Private health coverage

Pension

25 days holiday

Diverse environment

Job summary

Fractile is hiring a senior DFT architect to define the test architecture for a next-gen AI accelerator SoC in London. You will own the DFT strategy, flow, and signoff criteria, and collaborate with RTL, physical design and test teams to ensure clean integration and timely timing closure.

Lead hierarchical DFT for multi-core designs and large memories, define scan architecture, compression, and ATPG approaches, and drive tool integration (Synopsys/Tessent) across the EDA environment.

Qualifications

• 8+ years in DFT for complex ASIC/SoC designs.
• Ownership of DFT architecture on at least one large tapeout.
• Deep expertise in scan, compression, ATPG, and MBIST.
• Experience with industry tools (Synopsys or Tessent).
• Strong understanding of clocking, resets, power domains, and physical constraints.
• Experience with silicon bring-up, debug, and yield ramp.

Responsibilities

• Own and define the DFT architecture for a large AI accelerator SoC (scan, compression, MBIST, LBIST, boundary scan)
• Set DFT strategy, methodology, flow and signoff criteria
• Drive integration of DFT tools and flows into the overall EDA environment
• Define hierarchical DFT approach for multi-core designs and large memory systems
• Define scan architecture, compression strategy, and ATPG approach
• Define memory test and repair strategy for large embedded RAM
• Establish power-aware and at-speed test strategies
• Work closely with RTL and physical design to ensure clean DFT integration and timing closure
• Work with test and product engineering teams to bring up and debug ATPG patterns on ATE, supporting production test and yield ramp
• Mentor and guide DFT engineers

Skills

DFT architecture

Tapeout ownership

ATPG

MBIST

Scan & compression

Clocking & resets

Physical constraints

Tools

Synopsys

Tessent

Job description

Fractile is hiring a senior DFT architect to define the test architecture for a next-gen AI accelerator SoC in London. You will own the DFT strategy, flow, and signoff criteria, and collaborate with RTL, physical design and test teams to ensure clean integration and timely timing closure.

Lead hierarchical DFT for multi-core designs and large memories, define scan architecture, compression, and ATPG approaches, and drive tool integration (Synopsys/Tessent) across the EDA environment.